參數(shù)資料
型號(hào): CS4265-CNZ
廠(chǎng)商: Cirrus Logic Inc
文件頁(yè)數(shù): 17/46頁(yè)
文件大?。?/td> 0K
描述: IC CODEC 24BIT 104DB 32QFN
標(biāo)準(zhǔn)包裝: 60
類(lèi)型: 立體聲音頻
數(shù)據(jù)接口: PCM 音頻接口
分辨率(位): 24 b
ADC / DAC 數(shù)量: 2 / 2
三角積分調(diào)變:
動(dòng)態(tài)范圍,標(biāo)準(zhǔn) ADC / DAC (db): 104 / 104
電壓 - 電源,模擬: 3.13 V ~ 5.25 V
電壓 - 電源,數(shù)字: 3.13 V ~ 5.25 V
工作溫度: -10°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-QFN
供應(yīng)商設(shè)備封裝: 32-QFN 裸露焊盤(pán)(5x5)
包裝: 托盤(pán)
產(chǎn)品目錄頁(yè)面: 754 (CN2011-ZH PDF)
配用: 598-1001-ND - BOARD EVAL FOR CS4265 CODEC
其它名稱(chēng): 598-1039
24
DS657F3
CS4265
4. APPLICATIONS
4.1
Recommended Power-Up Sequence
1. Hold RESET low until the power supply, MCLK, and LRCK are stable. In this state, the Control Port is
reset to its default settings.
2. Bring RESET high. The device willremain in a low power state with the PDN bit set by default. The con-
trol port will be accessible.
3. The desired register settings can be loaded while the PDN bit remains set.
4. Clear the PDN bit to initiate the power-up sequence.
4.2
System Clocking
The CS4265 will operate at sampling frequencies from 4 kHz to 200 kHz. This range is divided into three
speed modes as shown in Table 1.
4.2.1
Master Clock
MCLK/LRCK must maintain an integer ratio as shown in Table 2. The LRCK frequency is equal to Fs, the
frequency at which audio samples for each channel are clocked into or out of the device. The FM bits (See
on page 39.) configure the device to generate the proper clocks in Master Mode, and receive the proper
clocks in Slave Mode. Table 2 illustrates several standard audio sample rates and the required MCLK and
LRCK frequencies.
Mode
Sampling Frequency
Single-Speed
4-50 kHz
Double-Speed
50-100 kHz
Quad-Speed
100-200 kHz
Table 1. Speed Modes
LRCK
(kHz)
MCLK (MHz)
64x
96x
128x
192x
256x
384x
512x
768x
1024x
32
-
--
-
8.1920
12.2880
16.3840
24.5760
32.7680
44.1
-
--
-
11.2896
16.9344
22.5792
33.8680
45.1584
48
-
--
-
12.2880
18.4320
24.5760
36.8640
49.1520
64
-
8.1920
12.2880
16.3840
24.5760
32.7680
-
88.2
-
11.2896
16.9344
22.5792
33.8680
45.1584
-
96
-
12.2880
18.4320
24.5760
36.8640
49.1520
-
128
8.1920
12.2880
16.3840
24.5760
32.7680
-
176.4
11.2896
16.9344
22.5792
33.8680
45.1584
-
192
12.2880
18.4320
24.5760
36.8640
49.1520
-
Mode
QSM
DSM
SSM
Table 2. Common Clock Frequencies
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參數(shù)描述
CS4265-CNZ/C1 制造商:Cirrus Logic 功能描述:
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CS4265-DNZR 功能描述:接口—CODEC IC 24-bit 192kHz Str Cdc w/PGA &Inpt Mux RoHS:否 制造商:Texas Instruments 類(lèi)型: 分辨率: 轉(zhuǎn)換速率:48 kSPs 接口類(lèi)型:I2C ADC 數(shù)量:2 DAC 數(shù)量:4 工作電源電壓:1.8 V, 2.1 V, 2.3 V to 5.5 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:DSBGA-81 封裝:Reel
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