參數(shù)資料
型號: CS5530-ISZ
廠商: Cirrus Logic Inc
文件頁數(shù): 36/36頁
文件大?。?/td> 0K
描述: IC ADC 24BIT 1CH W/LNA 20SSOP
標(biāo)準(zhǔn)包裝: 66
位數(shù): 24
采樣率(每秒): 3.84k
數(shù)據(jù)接口: 串行
轉(zhuǎn)換器數(shù)目: 1
功率耗散(最大): 45mW
電壓電源: 模擬和數(shù)字,雙 ±
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 20-SSOP(0.209",5.30mm 寬)
供應(yīng)商設(shè)備封裝: 20-SSOP
包裝: 管件
輸入數(shù)目和類型: 1 個(gè)差分,單極;1 個(gè)差分,雙極
產(chǎn)品目錄頁面: 755 (CN2011-ZH PDF)
配用: 598-1158-ND - BOARD EVAL FOR CS5530
其它名稱: 598-1283-5
CS5530
DS742F3
9
SWITCHING CHARACTERISTICS
(VA+ = 2.5 V or 5 V ±5%; VA- = -2.5V±5% or 0 V; VD+ = 3.0 V ±10% or 5 V ±5%;DGND = 0 V; Levels: Logic 0 = 0
V, Logic 1 = VD+; CL = 50 pF; See Figures 1 and 2.)
Notes: 21. Device parameters are specified with a 4.9152 MHz clock.
22. Specified using 10% and 90% points on waveform of interest. Output loaded with 50 pF.
23. Oscillator start-up time varies with crystal parameters. This specification does not apply when using an
external clock source.
Parameter
Symbol
Min
Typ
Max
Unit
Master Clock Frequency
(Note 21)
External Clock or Crystal Oscillator
MCLK
1
4.9152
5
MHz
Master Clock Duty Cycle
40
-
60
%
Rise Times
(Note 22)
Any Digital Input Except SCLK
SCLK
Any Digital Output
trise
-
50
1.0
100
-
s
ns
Fall Times
(Note 22)
Any Digital Input Except SCLK
SCLK
Any Digital Output
tfall
-
50
1.0
100
-
s
ns
Start-up
Oscillator Start-up Time
XTAL = 4.9152 MHz
(Note 23)
tost
-20-
ms
Serial Port Timing
Serial Clock Frequency
SCLK
0
-
2
MHz
Serial Clock
Pulse Width High
Pulse Width Low
t1
t2
250
-
ns
SDI Write Timing
CS Enable to Valid Latch Clock
t3
50
-
ns
Data Set-up Time prior to SCLK rising
t4
50
-
ns
Data Hold Time After SCLK Rising
t5
100
-
ns
SCLK Falling Prior to CS Disable
t6
100
-
ns
SDO Read Timing
CS to Data Valid
t7
--
150
ns
SCLK Falling to New Data Bit
t8
--
150
ns
CS Rising to SDO Hi-Z
t9
--
150
ns
相關(guān)PDF資料
PDF描述
LTC1443IS#TRPBF IC COMP W/REF LOWPWR QUAD 16SOIC
XRD8785AID-F IC ADC 8BIT PAR 15MSPS 24SOIC
LT1016CS8 IC COMPARATOR 10NS HI-SPD 8-SOIC
ADCMP600BKSZ-R2 IC COMP TTL/CMOS 1CHAN SC70-5
LTC1443IDHD#PBF IC COMP QD LP 1.182VREF 16-DFN
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
CS5530-ISZR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 24-Bit 1-ch Low Noise ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5531 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16 BIT AND 24 BIT ADCS WITH ULTRA LOW NOISE PGIA
CS5531_08 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:16-bit and 24-bit ADCs with Ultra-low-noise PGIA
CS5531-AS 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 2-Ch 16-Bit ADCs w/ Ultra Low Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
CS5531-ASR 功能描述:模數(shù)轉(zhuǎn)換器 - ADC IC 16-Bit ADCs w/UltraLw Noise PGIA RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32