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參數(shù)資料
| 型號(hào)： | CS8420-DSZ |
| 廠商： | Cirrus Logic Inc |
| 文件頁(yè)數(shù)： | 88/94頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC CONV S/R DGTL AUDIO 28-SOIC |
| 標(biāo)準(zhǔn)包裝： | 27 |
| 類型： | 采樣率轉(zhuǎn)換器 |
| 應(yīng)用： | 數(shù)字音頻 |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-SOIC（0.295"，7.50mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 28-SOIC |
| 包裝： | 管件 |
| 產(chǎn)品目錄頁(yè)面： | 759 (CN2011-ZH PDF) |
| 其它名稱： | 598-1729 |
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DS245F4
89
CS8420
16.3.2
Locking to the RXP/RXN Receiver Inputs
CS8420 parts that are configured to lock to only the RXP/RXN receiver inputs should use the external
PLL component values listed in Table 18 and Table 19. Values listed for the 32 to 96 kHz Fs range will
have the highest corner frequency jitter attenuation curve, take the shortest time to lock, and offer the best
output jitter performance.
Table 18. Locking to RXP/RXN - Fs = 8 to 96 kHz
Table 19. Locking to RXP/RXN - Fs = 32 to 96 kHz*
* Parts used in applications that are required to pass the AES3 or IEC60958-4 specification for receiver
jitter tolerance should use these component values. Please note that the AES3 and IEC60958 specifica-
tions do not have allowances for locking to sample rates less than 32 kHz or for locking to the ILRCK input.
Also note that many factors can affect jitter performance in a system. Please follow the circuit and layout
recommendations outlined previously.
16.3.3
Locking to the ILRCK Input
CS8420 parts that are configured to lock to the ILRCK input should use the external PLL component val-
ues listed in Table 20. Note that parts that need to lock to both ILRCK and RXP/RXN should use
these values. Values listed for the 32 to 96 kHz Fs range will have the highest corner frequency jitter at-
tenuation curve, take the shortest time to lock, and offer the best output jitter performance.
Table 20. Locking to the ILRCK Input
Revision
RFILT (kΩ)CFILT (μF)
CRIP (nF)
PLL Lock Time (ms)
D
0.909
1.8
33
56
D1
0.4
0.47
47
60
Revision
RFILT (kΩ)CFILT (μF)
CRIP (nF)
PLL Lock Time (ms)
D
3.0
0.047
2.2
35
D1
1.60.334.7
35
Revision
Fs Range
(kHz)
RFILT (kΩ)CFILT (μF) CRIP (nF) PLL Lock Time (ms)
D
8 to 96
1.3
2.7
62
120
D
32-96
5.1
0.15
3.9
70
D1
8 to 96
0.3
1.0
100
120
D1
32-96
0.6
0.22
22
70
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CS8420-DSZR | 功能描述:音頻 DSP IC Digital Audio Sample Rate Convertr RoHS:否 制造商:Texas Instruments 工作電源電壓: 電源電流: 工作溫度范圍: 安裝風(fēng)格: 封裝 / 箱體: 封裝:Tube |
| CS8421 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:32-bit, 192-kHz Asynchronous Sample Rate Converter |
| CS8421_06 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:32-bit, 192 kHz Asynchronous Sample Rate Converter |
| CS8421_09 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:32-bit, 192 kHz Asynchronous Sample Rate Converter |
| CS8421_10 | 制造商:CIRRUS 制造商全稱:Cirrus Logic 功能描述:32-bit, 192-kHz Asynchronous Sample Rate Converter |
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