參數(shù)資料
型號(hào)： CXD2529Q
廠商： Sony Corporation
元件分類： 數(shù)字信號(hào)處理
英文描述： CD Digital Signal Processor
中文描述： CD數(shù)字信號(hào)處理器
文件頁(yè)數(shù)： 35/64頁(yè)
文件大小： 675K
代理商： CXD2529Q
– 35 –
CXD2529Q
Timing Chart 1-12
CAV-W mode
EPWM = DCLV PWM MD = LPWR = 0
MDP
Acceleration
Z
Deceleration
264kHz
3.8μs
Timing Chart 1-13
CAV-W mode
EPWM = DCLV PWM MD = 0, LPWR = 1
MDP
Acceleration
Z
264kHz
3.8μs
The BRAKE pulse is masked when LPWR = 1.
Timing Chart 1-14
CAV-W mode
EPWM = 1, DCLV PWM MD = LPWR = 0
PWMI
MDP
H
L
H
L
Acceleration
Deceleration
Timing Chart 1-15
CAV-W mode
EPWM = 1, DCLV PWM MD = 0, LPWR = 1
PWMI
MDP
H
L
H
Z
Acceleration
The BRAKE pulse is masked when LPWR = 1.
Note)
The CLV-W and CAV-W modes support control only by the ternary output of the MDP pin.
Therefore, when using the CLV-W and CAV-W modes, set DCLV PWM MD to 0.
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PDF描述
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