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參數(shù)資料
| 型號(hào)： | CXD2529Q |
| 廠商： | Sony Corporation |
| 元件分類： | 數(shù)字信號(hào)處理 |
| 英文描述： | CD Digital Signal Processor |
| 中文描述： | CD數(shù)字信號(hào)處理器 |
| 文件頁數(shù)： | 36/64頁 |
| 文件大?。?/td> | 675K |
| 代理商： | CXD2529Q |
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CXD2529Q
1-2. Description of SENS Output
The following signals are output from SENS, depending on the microcomputer serial register value (latching
not required).
Note that the SENS output can be read out from the SQSO pin when SOCT = 0, SL1 = 1 and SL0 = 0. (See
the $BX commands.)
2. Subcode Interface
This section explains the subcode interface.
There are two methods for reading out a subcode externally. The 8-bit subcodes P to W can be read out from
SBSO by inputting EXCK to the CXD2529Q.
Sub Q can be read out after the CRC check of the 80 bits of data in the subcode frame. This is accomplished,
after checking SCOR and CRCF, by inputting 80 clock pulses to SQCK and reading out the data from the
SQSO pin.
2-1. P to W Subcode Read
Data can be read out by inputting EXCK immediately after WFCK falls. (See the Timing Chart 2-1.)
2-2. 80-bit Sub Q Read
Fig. 2-1 shows the peripheral block of the 80-bit Sub Q register.
First, Sub Q, regenerated at one bit per frame, is input to the 80-bit serial/parallel register and the CRC check
circuit.
96-bit Sub Q is input, and if the CRC is OK, it is output to SQSO with CRCF = 1. In addition, the 80 bits are
loaded into the parallel/serial register.
When SQSO goes high 400μs or more (monostable multivibrator time constant) after the subcode is read
out, the CPU determines that new data (which passed the CRC check) has been loaded.
In the CXD2529Q, when 80-bit data is loaded, the order of the MSB and LSB is inverted for each byte. As a
result, although the sequence of bytes is the same, the bits within the bytes are now ordered LSB first.
Once the fact that the 80-bit data has been loaded is confirmed, SQCK is input so that the data can be read
out. In the CXD2529Q, the SQCK input is detected, and when it is low the retriggerable monostable
multivibrator is reset.
The retriggerable monostable multivibrator has a time constant from 270 to 400μs. When the duration for
which SQCK is high is less than this time constant, the monostable multivibrator is kept reset; during this
interval, the S/P register is not loaded into the P/S register.
While the monostable multivibrator is being reset, data cannot be loaded in the 80-bit parallel/serial register.
In other words, while reading out with a clock cycle shorter than the monostable multivibrator time constant,
the register is not rewritten by CRCOK, etc. (See the Timing Chart 2-2.)
Although a clock is input from the SQCK pin to actually perform these operations, the high and low intervals
for this clock should be between 750ns and 120μs.
SEIN, a signal input to this LSI from the SSP, is output.
Low while the auto sequencer is in operation, high when operation
terminates.
Outputs the signal input to the FOK pin. Normally, FOK (from RF) is
input. High for “focus OK”.
SEIN, a signal input to this LSI from the SSP, is output.
High when the regenerated frame sync is obtained with the correct
timing.
Low when the EFM signal, after passing through the sync detection
filter, is lengthened by 64 channel clock pulses or more.
SENS pin is fixed to low.
SEIN
XBUSY
FOK
SEIN
GFS
OV64
“L”
$0X, 1X, 2X, 3X
$4X
$5X
$6X
$AX
$EX
$7X, 8X, 9X, BX,
CX, DX, FX
Microcomputer serial register
value (latching not required)
SENS
output
Meaning
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CXD2540Q-2 | CD DIGITAL SIGNAL PROCESSOR |
| CXD2548 | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2548R | CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2552 | 1 BIT D/A CONVERTER |
| CXD2552Q | 1 BIT D/A CONVERTER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CXD2531BR | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:ATRAC Encoder/Decoder |
| CXD2540Q-2 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR |
| CXD2545Q | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD DIGITAL SIGNAL PROCESSOR WITH BUILT-IN DIGITAL SERV |
| CXD2548 | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
| CXD2548R | 制造商:SONY 制造商全稱:Sony Corporation 功能描述:CD Digital Signal Processor with Built-in Digital Servo and DAC |
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