參數(shù)資料
型號(hào): CXD2548
廠商: Sony Corporation
元件分類: 數(shù)字信號(hào)處理
英文描述: CD Digital Signal Processor with Built-in Digital Servo and DAC
中文描述: CD數(shù)字信號(hào)處理器,具有內(nèi)置數(shù)字伺服和DAC
文件頁數(shù): 43/113頁
文件大?。?/td> 1286K
代理商: CXD2548
– 43 –
CXD2548R
$EX commands
Command
Data 1
CLV mode
CM3
CM2
CM1
CM0
D23
D22
D21
D20
Data 2
EPWM SPDC
ICAP
SFSL
D19
D18
D17
D16
Data 3
VC2C
HIFC
LPWR VPON
D15
D14
D13
D12
Command bit
CM3
CM2
CM1
Description
Spindle stop mode.
1
Spindle forward rotation mode.
1
Spindle reverse rotation mode. Valid only when LPWR = 0
in any modes.
1
Rough servo mode. When the RF-PLL circuit isn't locked,
this mode is used to pull the disc rotations within the RF-
PLL capture range.
PLL servo mode.
Automatic CLVS/CLVP switching mode.
Used for normal playback.
0
1
1
1
1
0
0
0
0
1
1
1
0
0
1
1
1
1
CM0
0
0
0
0
1
0
Mode
STOP
KICK
BRAKE
CLVS
CLVP
CLVA
1
See Timing Charts 1-6 to 1-12.
Command bit
EPWM SPDC
ICAP
Description
Crystal reference CLV servo.
Used for playback in CLV-W
mode.
2
Spindle control with VP0 to 7.
Spindle control with the external
PWM.
0
0
0
1
0
0
1
0
0
0
1
1
SFSL
0
0
0
0
VC2C
0
1
0
0
HIFC
0
1
1
1
LPWR
0
0
0
0
VPON
0
0
1
1
Mode
CLV-N
CLV-W
CAV-W
CAV-W
2
Figs. 3-1 and 3-2 show the control flow with the microcomputer software in CLV-W mode.
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