參數(shù)資料
型號(hào): CXD3511Q
廠商: Sony Corporation
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號(hào)驅(qū)動(dòng)器/時(shí)序發(fā)生器
文件頁數(shù): 18/79頁
文件大?。?/td> 531K
代理商: CXD3511Q
18
CXD3511Q
(b) Pre gain block
This block performs multiplication processing independently for ports 1 and 2. The settings are as follows.
Coefficient: 8 bits
Gain setting: 0 to 1.9921875 (= 255/128) times, variable in 256 steps
(Set independently for R, G and B ports 1 and 2)
Multiplication is performed using the 8-bit input and an 8-bit coefficient, and the upper 10 bits c[15:6] of the
operation results are output. Next, the c[6] value is checked and rounding is performed to 9 bits. The MSB of
the rounded 9 bits is checked, clipping is performed, and the lower 8 bits are output.
Coefficient
b[7:0]
a
×
b
Rounding
and
clipping
Output
Input
a[7:0]
c[15:6]
10
8
8
8
(c) Pre bright block
This block performs addition and subtraction processing independently for ports 1 and 2. The settings are as
follows.
Coefficient: 5 bits with code, MSB = code bit
Bright setting:
16 to +15 scales, variable with an accuracy of 1 bit
(Set independently for R, G and B ports 1 and 2)
Multiplication is performed using the 8-bit input and a 5-bit coefficient with code. The coefficient MSB is the
code bit. Addition is performed when b[4] = 0, and subtraction when b[4] = 1. However, when performing
subtraction, set the two's complement in the lower bits of the coefficient. When the operation results overflow
or underflow, clipping is performed.
Coefficient
b[4:0]
Addition/subtraction
and
clipping
Output
Input
a[7:0]
8
5
8
(d) User gain block
This block performs multiplication processing independently for ports 1 and 2. The settings are as follows.
Coefficient: 8 bits
Gain setting: 0 to 7.96875 (= 255/32) times, variable in 256 steps
(Settings shared by R, G and B)
Multiplication is performed using the 8-bit input and an 8-bit coefficient, and the upper 12 bits c[15:4] of the
operation results are output. Next, the c[4] value is checked and rounding is performed to 11 bits. The MSB of
the rounded 11 bits is checked, clipping is performed, and the lower 10 bits are output.
Coefficient
b[7:0]
a
×
b
Rounding
and
clipping
Output
Input
a[7:0]
c[15:4]
12
8
8
10
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