參數(shù)資料
型號: CXD3511Q
廠商: Sony Corporation
英文描述: Digital Signal Driver/Timing Generator
中文描述: 數(shù)字信號驅(qū)動器/時序發(fā)生器
文件頁數(shù): 76/79頁
文件大?。?/td> 531K
代理商: CXD3511Q
76
CXD3511Q
(h) PG_HWST[11:1] (sub addresses: 001h and 004h)
PG_HWSTP[11:1] (sub addresses: 001h and 005h)
These set the horizontal window area in 11 bits. The area can be set in 2-dot units using the front edge of the
HDIN input as the reference. Set the "(set point
52)/2" value.
(i) PG_VST[10:0] (sub addresses: 001h and 006h)
PG_VSTP[10:0] (sub addresses: 001h and 007h)
These set the vertical effective area in 11 bits. The area can be set in 1-line units using the front edge of the
VDIN input as the reference. Set the "set point
3" value.
(j) PG_VWST[10:0] (sub addresses: 001h and 008h)
PG_VWSTP[10:0] (sub addresses: 001h and 009h)
These set the vertical window area in 11 bits. The area can be set in 1-line units using the front edge of the
VDIN input as the reference. Set the "set point
4" value.
Effective area
Window area
PG_HST
HDIN
V
PG_VST
PG_VWST
PG_VWSTP
PG_VSTP
PG_HWST
PG_HSTP
PG_HWSTP
(k) PG_STEP[9:1] (sub address: 00Ah)
(Valid for PG_PAT[2:0] = 2h, 3h, 4h, and 5h)
This sets the vertical stripe, diagonal stripe, horizontal stripe, cross hatch and dot period in 9 bits. The period
can be set in 2-dot units. Set the "(period
2)/2" value.
(l) PG_WIDTH[9:0] (sub address: 00Bh)
(Valid for PG_PAT[2:0] = 2h, 3h, 4h, and 5h)
This sets the vertical stripe, diagonal stripe, horizontal stripe, cross hatch and dot line width in 10 bits. The
width can be set in 1-dot units. Set the "width" value.
(m) PG_SIG1R (G, B)[9:0] and PG_SIG2R (G, B)[9:0] (sub addresses: 00Ch to 011h)
These set the output signal level inside and outside the pattern area within the effective area in 10 bits. The
level can be set with an accuracy of 1 bit.
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