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參數(shù)資料
| 型號(hào)： | CXD8302Q |
| 廠(chǎng)商： | Sony Corporation |
| 英文描述： | PLL For CCD Cameras(用于CCD照相機(jī)的鎖相環(huán)電路) |
| 中文描述： | CCD相機(jī)的PLL（用于防治荒漠化公約照相機(jī)的鎖相環(huán)電路） |
| 文件頁(yè)數(shù)： | 5/10頁(yè) |
| 文件大?。?/td> | 183K |
| 代理商： | CXD8302Q |
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CXD8302Q
The phase relationship between external sync and EXTf
H
in each sync mode is shown below.
VD/HD sync mode
The rise and fall timings of EXTHD signal are directly reflected on EXTf
H
.
SYNC synchronous mode
The fall timing of EXTSYNC is the fall timing EXTf
H
, but the rise timing of EXTf
H
is generated by counting the
number of clocks input by the timing generator. Therefore, make sure to compare phases of fall timing of
between EXTf
H
and INTf
H
for PLL configuration in the SYNC synchronous mode.
Description of Operation
1) Operation overview
Functions as sync signal generator
Each of f
H
(INTf
H
), VD, HD, SYNC, and BLK pulses is generated from clocks input by the timing generator.
These pulses are generated by free running if external sync signals are not input.
External synchronization function (PLL)
When the SYNC (EXTSYNC) or VD/HD (EXTVD/EXTHD) external sync signal is input, the vertical reset is
compulsorily triggered on each of the f
H
(INTf
H
), VD, HD, SYNC, and BLK pulses, and f
H
(EXTf
H
) is
simultaneously generated according to the external sync signal. Phase comparison is done externally
between INTf
H
and EXTf
H
and a PLL circuit is configured, then the timing generator is synchronized with an
external sync signal.
EIA/CCIR
32
CCIR
EIA
Symbol
Pin No.
L
H
MODE1
26
MODE2
31
VD/HD sync mode:
EXTVD/EXTHD is used as the external
sync signal, and the EXTHD signal
becomes EXTf
H
.
Composite digital mode;
Clock frequency input by timing generator
EIA
17.897725MHz (1137.5f
H
= 5fsc)
CCIR 17.734475MHz
(1135 + 4/625f
H
= 4fsc)
SYNC sync mode:
EXTSYNC is used as the external sync
signal, and the EXTf
H
is obtained by
separating it from EXTSYNC
Component digital mode:
Clock frequency input by timing generator
EIA
18MHz (1144f
H
)
CCIR 18MHz (1152f
H
)
2) Mode setting
EXTHD
EXTf
H
EXTSYNC
(HSYNC)
EXTf
H
42 clocks
42 clocks
3) I/O pin capacitance
(V
DD
= 5V±0.25V, Topr = 0 to 70°C, V
SS
= 0V)
Item
Symbol
C
IN
Min.
2.0
4.0
Typ.
Max.
Unit
pF
pF
Input pin capacitance
C
OUT
Output pin capacitance
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