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參數(shù)資料
型號(hào): CY28551LFXC-3
廠商: Silicon Laboratories Inc
文件頁(yè)數(shù): 15/28頁(yè)
文件大?。?/td> 0K
描述: IC CLOCK INTEL/AMD SIS VIA 56QFN
標(biāo)準(zhǔn)包裝: 260
類(lèi)型: 時(shí)鐘/頻率發(fā)生器
PLL:
主要目的: Intel CPU,AMD CPU
輸入: 晶體
輸出: HCSL,LVCMOS
電路數(shù): 1
比率 - 輸入:輸出: 1:20
差分 - 輸入:輸出: 無(wú)/是
頻率 - 最大: 400MHz
電源電壓: 3.135 V ~ 3.465 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 56-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 56-QFN(8x8)
包裝: 托盤(pán)
CY28551-3
....................Document #: 001-05677 Rev. *D Page 22 of 28
TPERIODSSAbs 266-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point VOX
@ 1 clock
3.66463
3.85422
ns
TPERIODSSAbs 333-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point VOX
@ 1 clock
2.91470
3.10038
ns
TPERIODSSAbs 400-MHz CPUT and CPUC Absolute
period, SSC
Measured at crossing point VOX
@ 1 clock
2.41475
2.59782
ns
TSKEW
CPU0 to CPU1
Measured at crossing point VOX
100
ps
TCCJ
CPUT/C Cycle to Cycle Jitter
Measured at crossing point VOX
–85
ps
LACC
Long Term accuracy
Measured at crossing point VOX
100
ppm
TR/TF
CPUT and CPUC Rise and Fall Times
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
20
%
V_max
Max output Voltage
Math averages Figure 14
–1.15
V
V_min
Min output Voltage
Math averages Figure 14
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
CPU at 3.3V (SSC refers to –0.5% spread spectrum)
TR
Output Rise Edge Rate
Measured @ K8 test load using VOCM
± 400 mV, 0.850V to 1.650V
27
V/ns
TF
Output Fall Edge Rate
Measured @ K8 test load using VOCM
± 400 mV, 1.650V to 0.850V
27
V/ns
VDIFF
Differential Voltage
Measured @ K8 test load (single-ended)
0.4
2.3
V
DIFF
Change in VDIFF_DC Magnitude
Measured @ K8 test load (single-ended)
–150
150
mV
VCM
Common Mode Voltage
Measured @ K8 test load (single-ended)
1.05
1.45
V
CM
Change in VCM
Measured @ K8 test load (single-ended)
–200
200
mV
TDC
Duty Cycle
Measured at VOX
45
53
%
TCYC
Jitter, Cycle to Cycle
Measured at VOX
0
200
ps
TACCUM
Jitter, Accumulated
Measured at VOX
–1000
1000
ps
PCIEX
TDC
PCIEXT and PCIEXC Duty Cycle
Measured at crossing point VOX
45
55
%
TPERIOD
100-MHz PCIEXT and PCIEXC Period Measured at crossing point VOX @ 0.1s
9.99900
10.0010
ns
TPERIODSS
100-MHz PCIEXT and PCIEXC Period,
SSC
Measured at crossing point VOX @ 0.1s
9.99900
10.0010
ns
TPERIODAbs
100-MHz PCIEXT and PCIEXC
Absolute Period
Measured at crossing point VOX
@ 1 clock
9.87400
10.1260
ns
TPERIODSSAbs 100-MHz PCIEXT and PCIEXC
Absolute Period, SSC
Measured at crossing point VOX
@ 1 clock
9.87400
10.1763
ns
TSKEW
Any PCIEXT/C to PCIEXT/C Clock
Skew
Measured at crossing point VOX
250
ps
TCCJ
PCIEXT/C Cycle to Cycle Jitter
Measured at crossing point VOX
125
ps
LACC
PCIEXT/C Long Term Accuracy
Measured at crossing point VOX
100
ppm
TR/TF
PCIEXT and PCIEXC Rise and Fall
Times
Measured differentially from ±150 mV
2.5
8
V/ns
TRFM
Rise/Fall Matching
Measured single-endedly from ±75 mV
20
%
V_max
Max output Voltage
Math averages Figure 14
–1.15
V
V_min
Min output Voltage
Math averages Figure 14
–0.3
V
VOX
Crossing Point Voltage at 0.7V Swing
300
550
mV
DOT
TDC
DOT96T and DOT96C Duty Cycle
Measured at crossing point VOX
45
55
%
AC Electrical Specifications (continued)
Parameter
Description
Condition
Min.
Max.
Unit
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