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參數(shù)資料
| 型號： | CY7C1215H-133AXC |
| 廠商： | CYPRESS SEMICONDUCTOR CORP |
| 元件分類： | SRAM |
| 英文描述： | 1-Mbit (32K x 32) Pipelined Sync SRAM |
| 中文描述： | 32K X 32 CACHE SRAM, 4 ns, PQFP100 |
| 封裝： | 14 X 20 MM, 1.40 MM HEIGHT, LEAD FREE, MS-026, TQFP-100 |
| 文件頁數(shù)： | 14/15頁 |
| 文件大?。?/td> | 380K |
| 代理商： | CY7C1215H-133AXC |
CY7C1215H
Document #: 38-05666 Rev. *B
Page 8 of 15
Capacitance[9]
Parameter
Description
Test Conditions
100 TQFP
Max.
Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 2.5V
5
pF
CCLK
Clock Input Capacitance
5
pF
CI/O
Input/Output Capacitance
5
pF
Thermal Resistance[9]
Parameter
Description
Test Conditions
100 TQFP
Package
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test methods and
procedures for measuring thermal impedance, per
EIA/JESD51
30.32
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)
6.85
°C/W
AC Test Loads and Waveforms
Note:
9. Tested initially and after any design or process change that may affect these parameters.
OUTPUT
R = 317
R = 351
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50
Z0 = 50
VT = 1.5V
3.3V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1 ns
(c)
OUTPUT
R = 1667
R =1538
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50
Z0 = 50
VT = 1.25V
2.5V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1 ns
≤
1 ns
(c)
3.3V I/O Test Load
2.5V I/O Test Load
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY7C1215H-166AXC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 1MBIT 32KX32 3.5NS 100TQFP - Bulk |
| CY7C1217H-133AXC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC QUAD 3.3V 1.125MBIT 32KX36 7.5NS 100TQFP - Bulk |
| CY7C1218H-133AXC | 制造商:Cypress Semiconductor 功能描述: |
| CY7C1218H-166AXC | 制造商:Cypress Semiconductor 功能描述:SRAM SYNC SGL 3.3V 1.125MBIT 32KX36 3.5NS 100TQFP - Bulk |
| CY7C1219F-133AC | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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