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參數(shù)資料
| 型號(hào)： | CY8C20234 |
| 廠(chǎng)商： | Cypress Semiconductor Corp. |
| 英文描述： | PSoC Mixed-Signal Array(PSoC混合信號(hào)陣列) |
| 中文描述： | PSoC混合信號(hào)陣列（的PSoC混合信號(hào)陣列） |
| 文件頁(yè)數(shù)： | 19/32頁(yè) |
| 文件大?。?/td> | 378K |
| 代理商： | CY8C20234 |
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September 18, 2006
Document No. 001-05356 Rev. *B
19
CY8C20234, CY8C20334, CY8C20434 Final Data Sheet
2. Electrical Specifications
2.4.5
AC External Clock Specifications
The following tables list guaranteed maximum and minimum specifications for the voltage and temperature ranges: 4.75V to 5.25V
and -40
°
C
≤
T
A
≤
85
°
C, 3.0V to 3.6V and -40
°
C
≤
T
A
≤
85
°
C, or 2.4V to 3.0V and -40
°
C
≤
T
A
≤
85
°
C, respectively. Typical parameters
apply to 5V, 3.3V, or 2.7V at 25
°
C and are for design guidance only.
Table 2-16. 5V AC External Clock Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
F
OSCEXT
Frequency
0.750
–
12.6
MHz
–
High Period
38
–
5300
ns
–
Low Period
38
–
–
ns
μ
s
–
Power Up IMO to Switch
150
–
–
Table 2-17. 3.3V AC External Clock Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
F
OSCEXT
Frequency with CPU Clock divide by 1
0.750
–
12.6
MHz
Maximum CPU frequency is 12 MHz at 3.3V.
With the CPU clock divider set to 1, the external
clock must adhere to the maximum frequency
and duty cycle requirements.
–
High Period with CPU Clock divide by 1
41.7
–
5300
ns
–
Low Period with CPU Clock divide by 1
41.7
–
–
ns
μ
s
–
Power Up IMO to Switch
150
–
–
Table 2-18. 2.7V AC External Clock Specifications
Symbol
Description
Min
Typ
Max
Units
Notes
F
OSCEXT
Frequency with CPU Clock divide by 1
0.750
–
3.08
0
MHz
Maximum CPU frequency is 3 MHz at 2.7V.
With the CPU clock divider set to 1, the external
clock must adhere to the maximum frequency
and duty cycle requirements.
F
OSCEXT
Frequency with CPU Clock divide by 2 or greater
0.15
–
6.35
MHz
If the frequency of the external clock is greater
than 3 MHz, the CPU clock divider must be set
to 2 or greater. In this case, the CPU clock
divider will ensure that the fifty percent duty
cycle requirement is met.
–
High Period with CPU Clock divide by 1
160
–
5300
ns
–
Low Period with CPU Clock divide by 1
160
–
–
ns
μ
s
–
Power Up IMO to Switch
150
–
–
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| CY8C20334 | PSoC Mixed-Signal Array(PSoC混合信號(hào)陣列) |
| CY8C22213-24PVIT | PSoC Mixed Signal Array |
| CY8C22113 | PSoC Mixed Signal Array |
| CY8C22113-24PI | PSoC Mixed Signal Array |
| CY8C22113-24SI | PSoC Mixed Signal Array |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| CY8C20234_09 | 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:PSoC Programmable System-0n-Chip |
| CY8C20234_10 | 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Automotive PSoC? Programmable System-on-Chip |
| CY8C20234_11 | 制造商:CYPRESS 制造商全稱(chēng):Cypress Semiconductor 功能描述:Automotive PSoC Programmable System-on-Chip |
| CY8C20234-12LKXA | 功能描述:可編程片上系統(tǒng) - PSoC 13 I/O 8K FLASH 512 SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:67 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
| CY8C20234-12LKXAT | 功能描述:可編程片上系統(tǒng) - PSoC 13 I/O 8K FLASH 512 SRAM RoHS:否 制造商:Cypress Semiconductor 核心:8051 處理器系列:CY8C36 數(shù)據(jù)總線(xiàn)寬度:8 bit 最大時(shí)鐘頻率:67 MHz 程序存儲(chǔ)器大小:32 KB 數(shù)據(jù) RAM 大小:4 KB 片上 ADC:Yes 工作電源電壓:0.5 V to 5.5 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:QFN-68 安裝風(fēng)格:SMD/SMT |
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