參數(shù)資料
型號: CY8CLED04DOCD1-56LTXI
廠商: Cypress Semiconductor Corp
文件頁數(shù): 3/55頁
文件大小: 0K
描述: IC POWERPSOC DEBUG 4CH 1A 56VQFN
特色產(chǎn)品: PowerPSoC? Embedded Power Controller
標準包裝: 260
系列: PowerPSoC® CY8CLED
核心處理器: M8C
芯體尺寸: 8-位
速度: 24MHz
連通性: DALI,DMX512,I²C,IrDA,SPI,UART/USART
外圍設(shè)備: LED,LVD,POR,PWM,WDT
輸入/輸出數(shù): 14
程序存儲器容量: 16KB(16K x 8)
程序存儲器類型: 閃存
RAM 容量: 1K x 8
電壓 - 電源 (Vcc/Vdd): 4.75 V ~ 5.25 V
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 56-VFQFN 裸露焊盤
包裝: 托盤
產(chǎn)品目錄頁面: 698 (CN2011-ZH PDF)
配用: 428-2882-ND - KIT STARTER POWERPSOC LIGHTING
428-2281-ND - KIT EVAL POWERPSOC LIGHTING
428-2270-ND - KIT STARTER DEMO LIGHTING
其它名稱: 428-2923
CY8CLED04D01, CY8CLED04D02, CY8CLED04G01
CY8CLED03D01, CY8CLED03D02, CY8CLED03G01
CY8CLED02D01, CY8CLED01D01
Document Number: 001-46319 Rev. *P
Page 11 of 55
the routing is done. Table 5-1 illustrates example values of
Rsense for different currents.
The method to calculate the Rsense value for a desired average
Topology for HB-LEDs - AN52699
Figure 5-3. High Side Current Measurement
5.6 Voltage Comparators
There are six comparators that provide high speed comparator
operation for over voltage, over current, and various other
system event detections. For example, the comparators may be
used for zero crossing detection for an AC input line or
monitoring total DC bus current. Programmable internal analog
routing enables these comparators to monitor various analog
signals. These comparators include the following key features:
High speed comparator operation: 100 ns response time
Programmable interrupt generation
Low input offset voltage and input bias currents
Six precision voltage comparators are available. The differential
positive and negative inputs of the comparators are routed from
the analog multiplexer and the output goes to the digital
multiplexer. A programmable inverter is used to select the output
polarity. User-selectable hysteresis can be enabled or disabled
to trade-off noise immunity versus comparator sensitivity.
5.7 Reference DACs
The reference DACs are used to generate set points for various
analog modules such as Hysteretic controllers and comparators.
The reference DACs include the following key features:
8-bit resolution
Guaranteed monotonic operation
Low gain errors
10 us settling time
These DACs are available to provide programmable references
for the various analog and comparator functions and are
controlled by memory mapped registers.
DAC[0:7] are embedded in the hysteretic controllers and are
required to set the upper and lower thresholds for channel 0 to 3.
DAC [8:13] are connected to the Power Peripherals Analog
Multiplexer and provide programmable references to the
comparator bank. These are used to set trip points which enable
over voltage, over current, and other system event detection.
5.8 Built-in Switching Regulator
The switching regulator is used to power the low voltage (5 V
portion of the PowerPSoC) from the input line. This regulator is
based upon a peak current control loop which can support up to
250 mA of output current. The current not being consumed by
PowerPSoC is used to power additional system peripherals. The
key features of the built-in switching regulator include:
Ability to self power device from input line
Small filter component sizes
Fast response to transients
Refer to Table 15-20 for component values.
The 'Ref' signal that forms the reference to the Error Amplifier is
internally generated and there is no user control over it.
Figure 5-4. Built-in Switching Regulator
5.9 Analog Multiplexer
The PowerPSoC family’s analog MUX is designed to route
signals from the CSA output, function I/O pins and the DACs to
comparator inputs and the current sense inputs of the hysteretic
controllers. Additionally, CSA outputs can be routed to the AINX
block using this MUX.
For a full matrix representation of all possible routing using this
MUX, refer to the PowerPSoC Technical Reference Manual.
The CPU configures the Power Peripherals Analog Multiplexer
connections using memory mapped registers. The analog
multiplexer includes the following key features:
Signal integrity for minimum signal corruption
Table 5-1. Rsense Values for Different Currents
Max Load Current (mA)
Typical Rsense (m)
1000
100
750
130
500
200
350
300
CSP0
CSN0
CSP3
CSN3
CS3
CS0
.
Rsense3
Rsense0
Power
Peri
pheral
Anal
og
M
u
x
Error
Amplifier
Comparator
Ref
C IN
SREGFB
SREGSW
Current
Sense
Amplifier
SREGHVIN
VREGIN
SREGCSP
SREGCSN
Osc
Logic and
Gate
Drive
SREGCOMP
VREGOUT= 5V
1
D
L
Rsense
Ccomp
Rcomp
Rfb1
Rfb2
C1
ESR
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