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參數(shù)資料
| 型號： | DC956A |
| 廠商： | Linear Technology |
| 文件頁數(shù)： | 10/40頁 |
| 文件大?。?/td> | 0K |
| 描述： | BOARD DELTA SIGMA ADC LTC2485 |
| 軟件下載： | QuikEval System |
| 設計資源： | DC956A Design File DC956A Schematic |
| 標準包裝： | 1 |
| 系列： | Easy Drive™, QuikEval™ |
| ADC 的數(shù)量： | 1 |
| 位數(shù)： | 24 |
| 采樣率（每秒）： | 6.8 |
| 數(shù)據(jù)接口： | I²C，串行 |
| 工作溫度： | 0°C ~ 70°C |
| 已用 IC / 零件： | LTC2485 |
| 已供物品： | 板 |
| 相關產(chǎn)品： | LTC2485CDD#TRPBF-ND - IC ADC 24BIT I2C 10-DFN LTC2485IDD#TRPBF-ND - IC ADC 24BIT I2C 10-DFN LTC2485IDD#PBF-ND - IC ADC 24BIT I2C 10-DFN LTC2485CDD#PBF-ND - IC ADC 24BIT I2C 10-DFN |
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LTC2485
18
2485fc
APPLICATIONS INFORMATION
Discarding a Conversion Result and Initiating a New
Conversion with Optional Conguration Updating
At the conclusion of a conversion cycle, a Write cycle
can be initiated. Once the Write cycle is acknowledged,
a stop (P) command initiates a new conversion. If a new
conguration is required, this data can be written into the
device and a stop command initiates a new conversion,
see Figure 8.
Synchronizing Multiple LTC2485s with the Global
Address Call
In applications where several LTC2485s are used on the
same I2C bus, all LTC2485s can be synchronized with the
global address call. To achieve this, rst all the LTC2485s
must have completed the conversion cycle. The master
issues a Start, followed by the LTC2485 global address
1110111 and a Write request. All LTC2485s will be selected
and acknowledge the request. The master then sends
the write byte (Optional) and ends the Write operation
with a STOP. This will update the conguration registers
(if a write byte was sent) and initiate a new conversion
simultaneously on all the LTC2485s, as shown in Figure 9.
In order to synchronize the start of conversion without
affecting the conguration registers, the Write operation
can be aborted with a STOP. This initiates a new conversion
on all the LTC2485s without changing the conguration
registers.
Easy Drive Input Current Cancellation
The LTC2485 combines a high precision delta-sigma ADC
with an automatic differential input current cancellation
front end. A proprietary front-end passive sampling
network transparently removes the differential input cur-
rent. This enables external RC networks and high imped-
ance sensors to directly interface to the LTC2485 without
external ampliers. The remaining common mode input
current is eliminated by either balancing the differential
input impedances or setting the common mode input
equal to the common mode reference (see Automatic Input
Current Cancellation section). This unique architecture
does not require on-chip buffers enabling input signals to
swing all the way to ground and up to VCC. Furthermore,
the cancellation does not interfere with the transparent
offset and full-scale auto-calibration and the absolute ac-
curacy (full-scale + offset + linearity) is maintained even
with external RC networks.
Conversion Clock
A major advantage the delta-sigma converter offers over
conventional type converters is an on-chip digital lter
7-BIT ADDRESS
CONVERSION
SLEEP
DATA INPUT
S
W ACK
WRITE (OPTIONAL)
P
2485 F08
GLOBAL ADDRESS
SCL
SDA
LTC2485
…
LTC2485
ALL LTC2485s IN SLEEP
CONVERSION OF ALL LTC2485s
DATA INPUT
S
W ACK
WRITE (OPTIONAL)
P
2485 F09
Figure 8. Start a New Conversion without Reading Old Conversion Result
Figure 9. Synchronize the LTC2485s with the Global Address Call
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