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參數(shù)資料
| 型號(hào)： | DDP3300A |
| 廠(chǎng)商： | MICRONAS SEMICONDUCTOR HOLDING AG |
| 英文描述： | Single-Chip Display and Deflection Processor |
| 中文描述： | 單芯片顯示器和偏轉(zhuǎn)處理器 |
| 文件頁(yè)數(shù)： | 23/53頁(yè) |
| 文件大?。?/td> | 1767K |
| 代理商： | DDP3300A |
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DDP 3300 A
PRELIMINARY DATA SHEET
MICRONAS INTERMETALL
23
Table 3–1:
Control and status registers
I
2
C sub
address
Number
of bits
Mode
Function
Default
Name
PRIORITY BUS
priority mask register, if bit[x] is set to 1 then the function is
active for the respective signal priority
75
9
w v
bit [7:0]
bit[x] 0/1:select contrast,brightness,matrix
for main / side picture
0
PBCT
71
9
w v
bit [7:0]
bit[x] 0/1:select main(video)/external (via CLUT)
RGB
0
PBERGB
7d
9
w v
bit [7:0]
bit[x] 0/1:disable/enable black level expander
0
PBBLE
79
9
w v
bit [7:0]
bit[x] 0/1:disable/enable peaking transient
suppression when signal is switched
0
PBPK
4b
9
w v
bit [7:0]
bit[x] 0/1:disable/enable analog fast blank input
0
PBFB
47
9
w v
bit [2:0]
bit [8]
picture frame generator priority id
enable prio id for picture frame generator
0
PFGID
PFGEN
LUMA CHANNEL
61
9
w v
bit [5:0]
0..63/32
main picture contrast
32
CTM
65
9
w v
bit [5:0]
0..63/32
side picture contrast
32
CTS
51
9
w v
bit [8:0]
–256..255
main picture brightness
0
BRM
55
9
w v
bit [8:0]
–256..255
side picture brightness
0
BRS
59
9
w v
black level expander:
bit [3:0]
bit [8:4]
0..15
0...31
tilt coefficient
amount
8
12
BTLT
BAM
5d
9
w v
black level expander:
bit [8:0]
0..511
disable expansion, threshold value
200
BTHR
69
9
w v
luma peaking filter, the gain at high frequencies and small signal
amplitudes is: 1 + (k1+k2)/8
bit [3:0]
0..15
k1: peaking level undershoot
bit [7:4]
0..15
k2: peaking level overshoot
bit [8]
0/1
peaking value normal/inverted
(peaking/softening)
4
4
0
PKUN
PKOV
PKINV
6d
9
w v
luma peaking filter, coring
bit [4:0]
0..31
bit [7:5]
bit [8]
0/1
coring level
reserved
peaking filter center frequency high/low
3
0
COR
PFS
41
9
w v
luma soft limiter, slope A and B
bit [3:0]
bit [7:4]
slope segment A
slope segment B
0
0
LSLSA
LSLSB
45
9
w v
bit [7:0]
bit [8] 0/1
luma soft limiter absolute limit (unsigned)
modulation off/on
255
1
LSLAL
LSLM
49
9
w v
bit [8:0]
luma soft limiter segment B tilt point (unsigned)
300
LSLTB
4d
9
w v
bit [8:0]
luma soft limiter segment A tilt point (unsigned)
250
LSLTA
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DDP3310B | Display and Deflection Processor |
| DDR-TJS-T2 | LED AlInGaP |
| DD0-SJS-S1 | LED AlInGaP |
| DD0-SJS-S2 | LED AlInGaP |
| DD0-SJS-T1 | LED AlInGaP |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DDP3300A(DIP64) | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:Consumer IC |
| DDP3300A(PLCC68) | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:TV/Video Signal Processor |
| DDP3300A(SDIP64) | 制造商:未知廠(chǎng)家 制造商全稱(chēng):未知廠(chǎng)家 功能描述:TV/Video Signal Processor |
| DDP3300AD3 | 制造商:MICRONAS 功能描述:New |
| DDP3300APSD3 | 制造商:MICRONAS 功能描述:New |
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