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參數(shù)資料
| 型號： | DM8108 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | 8 port 10/100M Fast Ethernet Switching Controller |
| 中文描述： | 8端口10/100M快速以太網交換控制器 |
| 文件頁數(shù)： | 12/35頁 |
| 文件大小： | 371K |
| 代理商： | DM8108 |
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DM8108
8 port 10/100M Fast Ethernet Switching Controller
12
Preliminary
Version: DM8108-DS-P02
November 25, 1999
Operation Overview
The SW Architecture Family of switching devices has
been defined as low cost, high performance and
scalable architecture for a small switching system of
packetized data. Various devices will be developed.
The OEMs will be able to design robust switching
configurations based on the SW architecture.
The SW Architecture Family uses a “store-and-
forward’ switching approach. This approach has the
following advantages:
Store-and-forward switches allow switching
between differing speed media (e.g. 10Mbps and
100Mbps).
Store-and-forward switches improve overall
network performance by acting as a ‘network
cache’, effectively buffering packets during
times of heavy congestion.
Store-and-forward switches prevent the
erroneous packets from forwarding by analyzing
the frame check sequence (FCS) before
forwarding to the destination port.
Store-and-forward switches prevent illegal
frames (runt or oversized) from being forwarded
and thereby reduce the congestion caused
by bad packets.
The basic operation of DM8108 is very simple. The
DM8108 receives the incoming packets from the
Ethernet ports, searches in the Address Table for the
destination MAC address, and forwards the packet to
the appropriate port, which could be either local (one
of the DM8108’s port) or in a different DM8108
device that resides on the expansion bus. If the
destination address is not found, the packet will be
treated as a multicast packet and sent to every port
(other than the source port) and other devices on the
expansion bus.
The DM8108 automatically learns the port number of
attached network devices by examining the Source
MAC address of all incoming packets. If the Source
Address is not found in the Address Table, the device
adds it to the table (with source port and device
information). The Address Table is managed by
DM8108 individually.
Address Learning
The DM8108 can learn up to 16K unique MAC addresses.
Addresses are stored in the Address Table located in the
DRAM which will be initialized after RESET.
Packet Buffering
Incoming packets are buffered in the DRAM array. These
buffers provide elastic storage for transferring data between
low-speed and high speed segments. The packet buffers
are managed automatically by the DM8108.
Packet Forwarding Protocol
The DM8108 updates the Transmit Descriptor of the target
port, which is learned from Address Table, with the received
packet buffer location and packet length. The MAC of
target port will fetch the packet for transmission once the
memory bus is available.
Expansion Bus
The Expansion Bus is defined as a special case of a normal
Fast Ethernet MII port except running at much higher data
rate.
The designer can link several DM8108s within a switching
box or can link several switching boxes.
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| DM7123J | 2-Input Digital Multiplexer |
| DM7123W | 2-Input Digital Multiplexer |
| DM8123W | 2-Input Digital Multiplexer |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DM-810A | 功能描述:數(shù)字萬用表 DMM,TRMS 1000V AC/DC 600mA to 10A RoHS:否 制造商:Tektronix 產品:Multimeters 類型:Bench 準確性:0.04 % 電壓范圍:2 V to 2 kV 電阻范圍: 電容范圍: 顯示計數(shù): 頻率:10 Hz to 45 Hz, 850 Hz to 1 MHz 測距: 真均方根值: 數(shù)據(jù)保持: |
| DM-810A-C | 功能描述:數(shù)字萬用表 DMM,TRMS 1000V AC/DC 600mA to 10A, CALIB RoHS:否 制造商:Tektronix 產品:Multimeters 類型:Bench 準確性:0.04 % 電壓范圍:2 V to 2 kV 電阻范圍: 電容范圍: 顯示計數(shù): 頻率:10 Hz to 45 Hz, 850 Hz to 1 MHz 測距: 真均方根值: 數(shù)據(jù)保持: |
| DM8121J/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Input Digital Multiplexer |
| DM8121N/A+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Input Digital Multiplexer |
| DM8121N/B+ | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:8-Input Digital Multiplexer |
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