參數(shù)資料
型號(hào)： DM9102AT
廠商： Electronic Theatre Controls, Inc.
英文描述： Single Chip Fast Ethernet NIC controller
中文描述： 單芯片快速以太網(wǎng)網(wǎng)卡控制器
文件頁(yè)數(shù)： 52/77頁(yè)
文件大?。?/td> 459K
代理商： DM9102AT
DM9102A
Single Chip Fast Ethernet NIC controller
52
Final
Version: DM9102A-DS-F03
August 28, 2000
Transmit Descriptor Format
31
0
OWN
Status
Control bits
Buffer Address
Next Descriptor Address
TDES0
TDES1
TDES2
TDES3
Buffer Length
TDES0: Owner Bit with Transmit Status
Bit 31: OWN,
1=owned by DM9102A, 0=owned by host, this bit should be
set when the transmitting buffer is filled with data and ready
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OWN
to be transmitted. It will be reset by DM9102A after
transmitting the whole data buffer.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ES
EC
0
CC
TX
JT
LOC
NC
LC
0
FUE
DF
This word wide content includes status of transmitted frame.
They are loaded after the data buffer that belongs to the
corresponding descriptor is transmitted.
Bit 15: ES, Error Summary
It is set for the following error conditions:
Transmit Jabber Time-out (TXJT=1), Loss of Carrier
(LOC=1), No Carrier (NC=1), Late Collision (LC=1),
Excessive Collision (EC=1), FIFO Underrun Error (FUE=1).
Bit 14: TXJT, Transmit Jabber Time Out
It is set to indicate the transmitted frame is truncated due to
transmit jabber time out condition. The transmit jabber time
out interrupt CR5<3> is set.
Bit 11: LOC, Loss of Carrier
It is set to indicate the loss of carrier during the frame
transmission. It is not valid in internal loopback mode.
Bit 10: NC, No Carrier
It is set to indicate that no carrier signal from transceiver is
found. It is not valid in internal loopback mode.
Bit 9: LC, Late Collision
It is set to indicate a collision occurs after the collision
window of 64 bytes. Not valid if FUE is set.
Bit 8: EC, Excessive collision
It is set to indicate the transmission is aborted due to 16
excessive collisions.
Bit 7: Reserved
This bit is 0 when read.
Bits 6-3: CC, Collision Count
These bits show the number of collision before
transmission. Not valid if excessive collision bit is also set.
Bit 2: Reserved
This bit is 0 when read.
相關(guān)PDF資料
PDF描述
DM9108APPLICATIONENGINEERINGNOTESONE DM9108 Application Engineering notes one
DM9108APPLICATIONENGINEERINGNOTESTHREE DM9108 Application Engineering notes three
DM9108APPLICATIONENGINEERINGNOTESTWO DM9108 Application Engineering notes two
DM9161A 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
DM9161AE 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DM9102D 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER
DM9102DE 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
DM9102DEP 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes
DM9102H 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
DM9102HEP 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller
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