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參數(shù)資料
| 型號(hào)： | DM9102AT |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Single Chip Fast Ethernet NIC controller |
| 中文描述： | 單芯片快速以太網(wǎng)網(wǎng)卡控制器 |
| 文件頁(yè)數(shù)： | 57/77頁(yè) |
| 文件大?。?/td> | 459K |
| 代理商： | DM9102AT |
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DM9102A
Single Chip Fast Ethernet NIC controller
Final
Version: DM9102A-DS-F03
August 28, 2000
57
Serial Management Interface
The serial management interface uses a simple, two-wired
serial interface to obtain and control the status of PHY
management register set through an MDC and MDIO. The
Management Data Clock (MDC) is equipped with a
maximum clock rate of 2.5MHz, while Management Data
Input /Output (MDIO) works as a bi-directional, shared by up
to 32 devices.
In read/write operation, the management data frame is 64-
bit long start with 32 contiguous logic one bits (preamble)
synchronization clock cycles on MDC. The Start of Frame
Delimiter (SFD) is indicated by a <01> pattern followed by
the operation code (OP):<10> indicates Read operation and
<01> indicates Write operation. For read operation, a 2-bit
turnaround (TA) filing between Resistor Address field and
Data field is provided for MDIO to avoid contention. “Z”
stands for the state of high impedance. Following
turnaround time, a 16-bit data is read from or written onto
management registers.
Management Interface - Read Frame Structure
32 "1"s
0
1
1
0
A4
A3
A0
R4
R3
R0
Z
0
Idle
Preamble
SFD
Op Code
PHY Address
Register Address
Turn Around
Data
Read
Idle
Write
MDC
MDIO Read
D15
D14
D1
D0
//
//
Management Interface - Write Frame Structure
32 "1"s
0
1
1
0
A4
A3
A0
R4
R3
R0
1
0
D15
D14
D1
D0
Idle
Preamble
SFD
Op Code
PHY Address
Register Address
Write
Turn Around
Data
Idle
MDC
MDIO Write
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9108APPLICATIONENGINEERINGNOTESONE | DM9108 Application Engineering notes one |
| DM9108APPLICATIONENGINEERINGNOTESTHREE | DM9108 Application Engineering notes three |
| DM9108APPLICATIONENGINEERINGNOTESTWO | DM9108 Application Engineering notes two |
| DM9161A | 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER |
| DM9161AE | 10/100 MBPS FAST ETHEMET PHYSICAL LAYER SINGLE CHIP TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9102D | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SINGLE CHIP FAST ETHEMET NIC CONTROLLER |
| DM9102DE | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102DEP | 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 1 制造商:DAVICOM 功能描述:IC ENET CNTRL 10/100M PHY 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP 制造商:DAVICOM 功能描述:IC, ENET CNTRL, 10/100M PHY, 128LQFP; Data Rate:100Mbps; Ethernet Type:IEEE 802.3u; Supply Voltage Min:2.375V; Supply Voltage Max:2.625V; Digital IC Case Style:LQFP; No. of Pins:128; Interface Type:PCI; Operating Temperature Min:0C;;RoHS Compliant: Yes |
| DM9102H | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
| DM9102HEP | 制造商:DAVICOM 制造商全稱:DAVICOM 功能描述:Single Chip Fast Ethernet NIC Controller |
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