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參數(shù)資料
| 型號(hào)： | DM9338 |
| 文件頁數(shù)： | 23/43頁 |
| 文件大?。?/td> | 509K |
| 代理商： | DM9338 |
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DM9331
100 Mbps Twisted Pair/Fiber Ethernet Media Converter Chip
Preliminary 23
Version: DM9331-DS-P02
September 21, 2001
DAVICOM Specified Configuration Register (DSCR) - 16
Bit
16.15
Bit Name
BP_4B5B
Default
0, RW
Description
Bypass 4B5B encoding and 5B4B decoding :
1 = 4B5B encoder and 5B4B decoder function bypassed
0 = Normal 4B5B and 5B4B operation
Bypass scrambler/descrambler function :
1 = Scrambler and descrambler function bypassed
0 = Normal scrambler and descrambler operation
Bypass symbol alignment function:
1 = Receive functions (descrambler, symbol alignment and
symbol decoding functions) bypassed. Transmit functions
( symbol encoder and scrambler) bypassed
0 = Normal operation
BYPASS ADPOK :
Force signal detector (SD) active. This register is for debug only,
not release to customer.
1=Force SD is OK,
0=Normal operation
Reserved
100BASE-TX or FX mode control:
1 = 100BASE-TX operation
0 = 100BASE-FX operation
Far End Fault enable :
Control the Far End Fault mechanism associated with 100Base-FX
operation.
1 = Enable
0 = Disable
Reserved:
Write as 1.
Force good link in 100Mbps:
0 = Normal 100Mbps operation
1 = Force 100Mbps good link status
This bit is useful for diagnostic purposes.
Reserved:
Write as 0.
Reserved:
Write as 0, ignore on read.
Reduced power down control enable:
This bit is used to enable automatic reduced power down.
0: Disable automatic reduced power down.
1: Enable automatic reduced power down.
Reset state machine:
When writes 1 to this bit, all state machines of PHY will be reset.
This bit is self-clear after reset is completed.
MF preamble suppression control:
MCI frame preamble suppression control bit
1 = MF preamble suppression bit on
0 = MF preamble suppression bit off
Sleep mode:
16.14
BP_SCR
0, RW
16.13
BP_ALIGN
0, RW
16.12
BP_ADPOK
0, RW
16.11
16.10
Reserved
TX
0,RW
1, RW
16.9
FEF
0, RW
16.8
Reserved
1, RW
16.7
F_LINK_100
0, RW
16.6
Reserved
0, RW
16.5
Reserved
0, RO
16.4
RPDCTR-EN
1, RW
16.3
SMRST
0, RW
16.2
MFPSC
0, RW
16.1
SLEEP
0, RW
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| DM9334 | 8-Bit Addressable Latch |
| DM9334N | 8-Bit Addressable Latch |
| DM9348 | |
| DM93L00 | |
| DM93L01 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DM9338 WAF | 制造商:Texas Instruments 功能描述: |
| DM9338J/883 | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Register File |
| DM9338N | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:8-Bit Multiple Port Register |
| DM9338W/883 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| DM933N | 制造商:Texas Instruments 功能描述: |
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