參數(shù)資料
型號: DP8440V
英文描述: DRAM Controller
中文描述: DRAM控制器
文件頁數(shù): 13/46頁
文件大?。?/td> 644K
代理商: DP8440V
Programming the DP8440/41
(Continued)
4.3 PROGRAMMING SELECTION
(Continued)
ROW ADDRESS HOLD TIME SELECT t
RAH
C7
0
1
10 ns
15 ns
PAGMISS INPUT OR OUTPUT SELECT
C8
0
1
Input
Output
CAS PRECHARGE DURING BURST
C9
0
1
Read Cycle
(/2
T
1T
Write Cycle
1T
2T
REFRESH MODE SELECT
C10
0
1
RAS Only Refresh
CAS-before-RAS Refresh
FINE TUNE REFRESH CYCLE
C11
0
1
15
m
s
120
m
s
COLUMN ADDRESS COUNTER CONTROL SELECT
B0
0
1
DTACK Falling Edge
DTACK Rising Edge
PAGE OR NORMAL MODE SELECT
B1
0
1
Page Mode
Normal Mode
ADDRESS LATCH MODE
ECAS 0
0
1
Latch Mode
Fall Through Mode
BURST REQUEST SELECT (BSTARQ INPUT)
ECAS1
0
1
Active Low
Active High
CAS AND DTACK CLOCK EDGE SELECT
ECAS2
0
1
Rising Edge
Falling Edge
RESERVED
ECAS3
0
1
13
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