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參數(shù)資料
| 型號： | DPL4519 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Sound Processor for Digital and Analog Surround Systems |
| 中文描述： | 聲音處理器的數(shù)字和模擬環(huán)繞聲系統(tǒng) |
| 文件頁數(shù)： | 16/64頁 |
| 文件大?。?/td> | 1073K |
| 代理商： | DPL4519 |
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DPL 4519G
PRELIMINARY DATA SHEET
16
Micronas
Fig. 3–1:
I
2
C bus protocol (MSB first; data must be stable while clock is high)
3.1.5. Proposals for General DPL 4519G
I
2
C Telegrams
3.1.5.1. Symbols
daw
dar
<
>
aa
dd
write device address (80
hex
, 84
hex
or 88
hex
)
read device address (81
hex
, 85
hex
or 89
hex
)
Start Condition
Stop Condition
Address Byte
Data Byte
3.1.5.2. Write Telegrams
<daw 00 d0 00>
<daw 10 aa aa dd dd>
<daw 12 aa aa dd dd>
write to CONTROL register
write data into demodulator
write data into DSP
3.1.5.3. Read Telegrams
<daw 00 <dar dd dd>
read data from
CONTROL register
<daw 11 aa aa <dar dd dd>
read data from demodulator
<daw 13 aa aa <dar dd dd>
read data from DSP
3.1.5.4. Examples
<80 00 80 00>
<80 00 00 00>
<80 12 00 08 08 20>
RESET DPL statically
Clear RESET
Set Main channel
source to I2S3 - L/R
Set Main volume to 0 dB
<80 12 00 00 73 00>
More examples of typical application protocols are
listed in Section 3.4. “Programming Tips” on page 34.
3.2. Start-Up Sequence:
Power-Up and I
2
C Controlling
After POWER ON or RESET (see Fig. 4–21), the IC is
in an inactive state. All registers are in the reset posi-
tion, the analog outputs are muted. The controller has
to initialize all registers for which a non-default setting
is necessary.
3.3. DPL 4519G Programming Interface
3.3.1. User Registers Overview
The DPL 4519G is controlled by means of user regis-
ters. The complete list of all user registers is given in
the following tables. The registers are partitioned into
two sections:
1. Subaddress 10
hex
for writing, 11
hex
for reading and
2. Subaddress 12
hex
for writing, 13
hex
for reading.
Write and read registers are 16-bit wide, whereby the
MSB is denoted bit[15]. Transmissions via I
2
C bus
have to take place in 16-bit words (two byte transfers,
with the most significant byte transferred first). All write
registers, except MODUS and I2S CONFIGURATION,
are readable.
Unused parts of the 16-bit write registers must be zero.
Addresses not given in this table must not be
accessed.
1
0
S
P
I2C_DA
I2C_CL
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DPL4519G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Sound Processor for Digital and Analog Surround Systems |
| DPLF | 功能描述:電線導管 Data Patch Panel Front Label Holder RoHS:否 制造商:Panduit 類型:Slotted SideWall Open finger design wiring cut 材料:Polypropylene 顏色:Light Gray 大小: 最大光束直徑: 抗拉強度: 外部導管寬度:25 mm 外部導管高度:25 mm |
| DP-LF | 功能描述:烙鐵 Inline Filters RoHS:否 制造商:Weller 產(chǎn)品:Soldering Stations 類型:Digital, Iron, Stand, Cleaner 瓦特:50 W 最大溫度:+ 850 F 電纜類型:US Cord Included |
| DPLG-1 | 制造商:Thomas & Betts 功能描述:CLOSURE PLUG NON METALLIC 1/2'' 制造商:Thomas & Betts 功能描述:CLOSURE PLUG, NON METALLIC, 1/2''; Accessory Type:Closure Plug; For Use With:Threaded Rigid / IMC Conduit ;RoHS Compliant: Yes 制造商:Thomas & Betts 功能描述:Universal Recessed Box And Cover |
| DPLG-1-BR | 制造商:Thomas & Betts 功能描述:Universal Recessed Box And Cover |
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