參數(shù)資料
型號(hào): DPL4519
廠商: Electronic Theatre Controls, Inc.
英文描述: Sound Processor for Digital and Analog Surround Systems
中文描述: 聲音處理器的數(shù)字和模擬環(huán)繞聲系統(tǒng)
文件頁(yè)數(shù): 23/64頁(yè)
文件大?。?/td> 1073K
代理商: DPL4519
PRELIMINARY DATA SHEET
DPL 4519G
Micronas
23
SOURCE SELECT AND OUTPUT CHANNEL MATRIX
00 08
hex
00 09
hex
00 0A
hex
00 0B
hex
00 48
hex
Source for:
Main Output
Aux Output
SCART1 DA Output
I
2
S Output
Surround Processing
I
2
S1 input
I
2
S2 input
I
2
S3 input channels 1&2 (e.g. Lt,Rt)
1)
I
2
S3 input channels 3&4 (e.g. L,R)
1)
or
Pro Logic processed L, R
I
2
S3 input channels 5&6 (e.g. SL,SR)
1)
or
Pro Logic processed S, S (both channels same signal)
I
2
S3 input channels 7&8 (e.g. C,SUB)
1)
or
Pro Logic processed C, SUB
1)
exemplary channel assignment in a Micronas digital multichannel sound sys-
tem with MAS 3528E and MSP 4450G.
bit[15:8]
5
6
7
8
9
10
SRC_MAIN
SRC_AUX
SRC_SCART1
SRC_I2S
SRC_DPL
00 08
hex
00 09
hex
00 0A
hex
00 0B
hex
00 48
hex
Channel Matrix for:
Main Output
Aux Output
SCART1 DA Output
I
2
S Output
Surround Processing
bit[7:0]
00
hex
10
hex
20
hex
30
hex
Sound A Mono (or Left Mono)
Sound B Mono (or Right Mono)
Stereo (transparent mode)
Mono (L+R)/2
Usually the matrix modes should be set to “Stereo” (transparent).
MAT_MAIN
MAT_AUX
MAT_SCART1
MAT_I2S
MAT_DPL
Table 3–9:
Write Registers on I
2
C Subaddress 12
hex
, continued
Register
Address
Function
Name
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