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| 型號： | DPL4519 |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Sound Processor for Digital and Analog Surround Systems |
| 中文描述： | 聲音處理器的數(shù)字和模擬環(huán)繞聲系統(tǒng) |
| 文件頁數(shù)： | 49/64頁 |
| 文件大?。?/td> | 1073K |
| 代理商： | DPL4519 |
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PRELIMINARY DATA SHEET
DPL 4519G
Micronas
49
4.6.2.3. Crystal Recommendations
Symbol
Parameter
Pin Name
Min.
Typ.
Max.
Unit
General Crystal Recommendations
f
P
Crystal Parallel Resonance Fre-
quency at 12 pF Load Capacitance
18.432
MHz
R
R
Crystal Series Resistance
8
25
C
0
Crystal Shunt (Parallel) Capacitance
6.2
7.0
pF
C
L
External Load Capacitance
1)
XTAL_IN,
XTAL_OUT
PSDIP
P(L)QFP approx. 3.3
approx. 1.5
pF
pF
Crystal Recommendations for Master-Slave Applications
(DPL Clock must perform synchronization to I
2
S
clock)
f
TOL
Accuracy of Adjustment
20
+
20
ppm
D
TEM
Frequency Variation
versus Temperature
20
+
20
ppm
C
1
Motional (Dynamic) Capacitance
19
24
fF
f
CL
Required Open Loop Clock
Frequency (T
amb
= 25
°
C)
AUD_CL_OUT
18.431
18.433
MHz
Crystal Recommendations for other Applications
(No synchronization to I
2
S clock possible)
f
TOL
Accuracy of Adjustment
100
+
100
ppm
D
TEM
Frequency Variation
versus Temperature
50
+
50
ppm
f
CL
Required Open Loop Clock
Frequency (T
amb
= 25
°
C)
AUD_CL_OUT
18.429
18.435
MHz
Amplitude Recommendation for Operation with External Clock Input
(C
load
after reset typ. 22 pF)
V
XCA
External Clock Amplitude
XTAL_IN
0.7
V
pp
1)
External capacitors at each crystal pin to ground are required. They are necessary to tune the open-loop fre-
quency of the internal PLL and to stabilize the frequency in closed-loop operation.
Due to different layouts, the accurate capacitor size should be determined with the customer PCB. The sug-
gested values (1.5...3.3 pF) are figures based on experience and should serve as “start value”.
To define the capacitor size, reset the DPL without transmitting any further I2C telegrams. Measure the fre-
quency at AUD_CL_OUT-pin. Change the capacitor size until the free running frequency matches 18.432 MHz
as closely as possible. The higher the capacity, the lower the resulting clock frequency.
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參數(shù)描述 |
|---|---|
| DPL4519G | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Sound Processor for Digital and Analog Surround Systems |
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| DPLG-1-BR | 制造商:Thomas & Betts 功能描述:Universal Recessed Box And Cover |
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