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參數(shù)資料
| 型號： | DS1314S-2+T&R |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 5/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTRLR NV W/BATT MON 3V 8-SOIC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 控制器類型： | 非易失性 RAM |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應(yīng)商設(shè)備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
DS1314
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In addition to battery-backup support, the DS1314 performs the important function of monitoring the
remaining capacity of the lithium battery and providing a warning before the battery reaches end-of-life.
Because the open-circuit voltage of a lithium backup battery remains relatively constant over the majority
of its life, accurate battery monitoring requires loaded-battery voltage measurement. The DS1314
performs such measurement by periodically comparing the voltage of the battery as it supports an internal
resistive load with a carefully selected reference voltage. If the battery voltage falls below the reference
voltage under such conditions, the battery will soon reach end-of-life. As a result, the Battery Warning
pin is activated to signal the need for battery replacement.
MEMORY BACKUP
The DS1314 performs all the circuit functions required to provide battery-backup for an SRAM. First, the
device provides a switch to direct power from the battery or the system power supply (VCCI). Whenever
VCCI is less than the switch point VSW and VCCI is less than the battery voltage VBAT, the battery is
switched in to provide backup power to the SRAM. This switch has voltage drop of less than 0.2 volts.
Second, the DS1314 handles power failure detection and SRAM write protection. VCCI is constantly
monitored, and when the supply goes out of tolerance, a precision comparator detects power failure and
inhibits chip enable output ( CEO ) in order to write-protect the SRAM. This is accomplished by holding
CEO
to within 0.2 volts of VCCO when VCCI is out of tolerance. If CEI is (active) low at the time that
power failure is detected, the CEO signal is kept low until CEI is brought high again. Once CEI is
brought high, CEO is taken high and held high until after VCCI has returned to its nominal voltage level. If
CEI
is not brought high by 1.5 s after power failure is detected, CEO is forced high at that time. This
specific scheme for delaying write protection for up to 1.5 s guarantees that any memory access in
progress when power failure occurs will complete properly. Power failure detection occurs at 3.0V
nominal (3.3V supply) when the TOL pin is wired to GND or at 2.7V nominal (3.0V supply) when TOL
is connected to VCCO.
BATTERY VOLTAGE MONITORING
The DS1314 automatically performs periodic battery voltage monitoring at a factory-programmed time
interval of 24 hours. Such monitoring begins within tREC after VCCI rises above VCCTP, and is suspended
when power failure occurs.
After each 24-hour period (tBTCN) has elapsed, the DS1314 connects VBAT to an internal 1.2 M test
resistor (RINT) for one second (tBTPW). During this one second, if VBAT falls below the factory-
programmed battery voltage trip point (VBTP), the battery warning output BW is asserted. While BW is
active battery testing will be performed with period tBTCW to detect battery removal and replacement.
Once asserted, BW remains active until the battery is physically removed and replaced by a fresh cell.
The battery is still re-tested after each VCC power-up, however, even if BW was active on power-down. If
the battery is found to be higher than VBTP during such testing, BW is deasserted and regular 24-hour
testing resumes. BW has an open-drain output driver.
Battery replacement following BW activation is normally done with VCCI nominal so that SRAM data is
not lost. During battery replacement, the minimum time duration between old battery detachment and
new battery attachment (tBDBA) must be met or BW will not deactivate following attachment of the new
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| DS1312E | IC CONTROLLER NV BW/RST 20-TSSOP |
| DS1314S-2 | IC CTRLR NV W/BATT MON 3V 8-SOIC |
| DS1312E+T&R | IC CONTROLLER NV BW/RST 20-TSSOP |
| LTC4301LCMS8#TRPBF | IC BUFFER BUS HOTSWAP 2WR 8MSOP |
| DS1312S/T&R | IC CONTROLLER NV BW/RST 16-SOIC |
相關(guān)代理商/技術(shù)參數(shù) |
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| DS1315 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315-33 | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1315-33+ | 功能描述:實時時鐘 Phantom Time Chip RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風(fēng)格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1315-3V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Real-Time Clock |
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