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參數(shù)資料
| 型號： | DS1314S-2+T&R |
| 廠商： | Maxim Integrated |
| 文件頁數(shù)： | 6/12頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTRLR NV W/BATT MON 3V 8-SOIC |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 控制器類型： | 非易失性 RAM |
| 電源電壓： | 3 V ~ 3.6 V |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 8-SOIC（0.154"，3.90mm 寬） |
| 供應商設備封裝： | 8-SOIC |
| 包裝： | 帶卷 (TR) |
DS1314
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battery. Should BW not deactivate for this reason, the new battery can be detached for tBDBA and then re-
attached to clear BW .
NOTE: The DS1314 cannot constantly monitor an attached battery because such monitoring would
drastically reduce the life of the battery. As a result, the DS1314 only tests the battery for one second out
of every 24 hours and does not monitor the battery in any way between tests. If a good battery (one that
has not been previously flagged with BW ) is removed between battery tests, the DS1314 may not
immediately sense the removal and may not activate BW until the next scheduled battery test. If a battery
is then reattached to the DS1314, the battery may not be tested until the next scheduled test.
NOTE: Battery monitoring is only a useful technique when testing can be done regularly over the entire
life of a lithium battery. Because the DS1314 only performs battery monitoring when VCC is nominal,
systems which are powered-down for excessively long periods can completely drain their lithium cells
without receiving any advanced warning. To prevent such an occurrence, systems using the DS1314
battery monitoring feature should be powered-up periodically (at least once every few months) in order to
perform battery testing. Furthermore, anytime BW is activated on the first battery test after a power-up,
data integrity should be checked via checksum or other technique.
POWER MONITORING
DS1314S and DS1314E varieties have an additional reset pin. These varieties detect out-of-tolerance
power supply conditions and warn a processor-based system of impending power failure. When VCCI falls
below the trip point level defined by the TOL pin (VCCTP), the VCCI comparator activates the reset signal
RST
. Reset occurs at 3.0V nominal (3.3V supply) when the TOL pin is connected to GND or at 2.7V
nominal (3.0V supply) when TOL is connected to VCCO.
RST
also serves as a power-on reset during power-up. After VCCI exceeds VCCTP, RST will be held active
for 200 ms nominal (tRPU). This reset period is sufficiently long to prevent system operation during
power-on transients and to allow tREC to expire. RST has an open-drain output driver.
FRESHNESS SEAL MODE
When the battery is first attached to the DS1314 without VCC power applied, the device does not
immediately provide battery-backup power on VCCO. Only after VCCI exceeds VCCTP and later falls below
both VSW and VBAT will the DS1314 leave Freshness Seal Mode and provide battery-backup power. This
mode allows a battery to be attached during manufacturing but not used until after the system has been
activated for the first time. As a result, no battery energy is drained during storage and shipping.
相關PDF資料 |
PDF描述 |
|---|---|
| DS1312E | IC CONTROLLER NV BW/RST 20-TSSOP |
| DS1314S-2 | IC CTRLR NV W/BATT MON 3V 8-SOIC |
| DS1312E+T&R | IC CONTROLLER NV BW/RST 20-TSSOP |
| LTC4301LCMS8#TRPBF | IC BUFFER BUS HOTSWAP 2WR 8MSOP |
| DS1312S/T&R | IC CONTROLLER NV BW/RST 16-SOIC |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1315 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315_07 | 制造商:DALLAS 制造商全稱:Dallas Semiconductor 功能描述:Phantom Time Chip |
| DS1315-33 | 功能描述:實時時鐘 RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1315-33+ | 功能描述:實時時鐘 Phantom Time Chip RoHS:否 制造商:Microchip Technology 功能:Clock, Calendar. Alarm RTC 總線接口:I2C 日期格式:DW:DM:M:Y 時間格式:HH:MM:SS RTC 存儲容量:64 B 電源電壓-最大:5.5 V 電源電壓-最小:1.8 V 最大工作溫度:+ 85 C 最小工作溫度: 安裝風格:Through Hole 封裝 / 箱體:PDIP-8 封裝:Tube |
| DS1315-3V | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Real-Time Clock |
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