參數(shù)資料
型號(hào): DS1865T+
廠商: Maxim Integrated Products
文件頁(yè)數(shù): 36/67頁(yè)
文件大小: 0K
描述: IC PON TRIPLEXER CTRLR 28TQFN-EP
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 1
系列: *
類型: *
應(yīng)用: *
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應(yīng)商設(shè)備封裝: 28-TQFN-EP(5x5)
包裝: 管件
DS1865
PON Triplexer Control and
Monitoring Circuit
____________________________________________________________________
41
Lower Memory, Register 7Bh to 7Eh: Password Entry (PWE)
POWER-ON VALUE
FFFF FFFFh
READ ACCESS
N/A
WRITE ACCESS
All
MEMORY TYPE:
Volatile
7Bh
2
31
2
30
2
29
2
28
2
27
2
26
2
25
2
24
7Ch
2
23
2
22
2
21
2
20
2
19
2
18
2
17
2
16
7Dh
2
15
2
14
2
13
2
12
2
11
2
10
2
9
2
8
7Eh
2
7
2
6
2
5
2
4
2
3
2
1
2
0
bit7
bit0
Password Entry. There are two passwords for the DS1865. Each password is 4 bytes long. The lower level password (PW1) will
have access to all unprotected areas plus those made available with PW1. The higher level password (PW2) will have all the
access of PW1 plus those made available with PW2. The values of the passwords reside in EEPROM inside of PW2 memory. At
power-up, all PWE bits are set to 1. All reads at this location are 0.
Lower Memory, Register 7Fh: Table Select (TBL SEL)
POWER-ON VALUE
00h
READ ACCESS
All
WRITE ACCESS
All
MEMORY TYPE
Volatile
7Fh
2
7
2
6
2
5
2
4
2
3
2
1
2
0
bit7
bit0
The upper memory tables (Table 01h–06h) of the DS1865 are accessible by writing the desired table value in this register.
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