Table 02h" />
參數資料
型號: DS1865T+
廠商: Maxim Integrated Products
文件頁數: 52/67頁
文件大?。?/td> 0K
描述: IC PON TRIPLEXER CTRLR 28TQFN-EP
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
系列: *
類型: *
應用: *
安裝類型: 表面貼裝
封裝/外殼: 28-WFQFN 裸露焊盤
供應商設備封裝: 28-TQFN-EP(5x5)
包裝: 管件
DS1865
PON Triplexer Control and
Monitoring Circuit
56
____________________________________________________________________
Table 02h, Register B8h: FETG Enable1 (FETG EN1)
FACTORY DEFAULT
00h
READ ACCESS
PW2
WRITE ACCESS
PW2
MEMORY TYPE:
Nonvolatile (SEE)
B8h
TEMP EN
VCC EN
MON1 EN
MON2 EN
MON3 EN
MON4 EN
RESERVED
bit7
bit0
Configures the maskable interrupt for the FETG pin.
bit7
TEMP EN: Enables/disables active interrupts on the FETG pin due to temperature measurements
outside the threshold limits.
0 = Disable (Default).
1 = Enable.
bit6
VCC EN: Enables/disables active interrupts on the FETG pin due to VCC measurements outside the
threshold limits.
0 = Disable (Default).
1 = Enable.
bit5
MON1 EN: Enables/disables active interrupts on the FETG pin due to MON1 measurements
outside the threshold limits.
0 = Disable (Default).
1 = Enable.
bit4
MON2 EN: Enables/disables active interrupts on the FETG pin due to MON2 measurements
outside the threshold limits.
0 = Disable (Default).
1 = Enable.
bit3
MON3 EN: Enables/disables active interrupts on the FETG pin due to MON3 measurements
outside the threshold limits.
0 = Disable (Default).
1 = Enable.
bit2
MON4 EN: Enables/disables active interrupts on the FETG pin due to MON4 measurements
outside the threshold limits.
0 = Disable (Default).
1 = Enable.
bit1:0
RESERVED (Default = 0)
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DS1865T+TR 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:PON Triplexer Control and Monitoring Circuit