- 您現(xiàn)在的位置：買賣IC網 > PDF目錄1913 > DS1865T+ (Maxim Integrated Products)IC PON TRIPLEXER CTRLR 28TQFN-EP PDF資料下載
參數(shù)資料
| 型號： | DS1865T+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 44/67頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC PON TRIPLEXER CTRLR 28TQFN-EP |
| 產品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 1 |
| 系列： | * |
| 類型： | * |
| 應用： | * |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 28-TQFN-EP（5x5） |
| 包裝： | 管件 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁當前第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁
DS1865
PON Triplexer Control and
Monitoring Circuit
____________________________________________________________________
49
Table 02h, Register 89h: Config
FACTORY DEFAULT
00h
READ ACCESS
PW2
WRITE ACCESS
PW2
MEMORY TYPE:
Nonvolatile (SEE)
89h
FETG DIR
TX-F EN
RESERVED
ASEL
RESERVED
bit7
bit0
Configure the memory location and the polarity of the digital outputs.
bit7
FETG DIR: Chooses the direction or polarity of the FETG output for normal operation.
0 = (Default) Under normal operation, FETG is pulled low. Intended for use with nMOS.
1 = Under normal operation, FETG is pulled high. Intended for use with pMOS.
bit6
TX-F EN: The TX-F output pin always reflects the wired-OR of all TXF enabled alarm states. This bit
will enable the latching of the alarm state for the TXF output pin.
0 = (Default) Not latched.
1 = The alarm bits are latched until cleared by a TX-D transition or power-down. If VCC_Lo_Alarm is
enabled for either FETG or TX-F then latching is disabled until the after the first VCC measurement is
made above the VCC_Lo set point to allow for proper operation during slow power-on cycles.
bit5
RESERVED
bit4
ASEL: Address Select.
0 = (Default) Device Address of A2h.
1 = I2C slave address is determined by the value programmed in the DEVICE ADDRESS byte
(Table 02h, Register 8Ch).
bit3:0
RESERVED
Table 02h, Register 8Ah: Startup Step
FACTORY DEFAULT:
00h
READ ACCESS
PW2
WRITE ACCESS
PW2
MEMORY TYPE:
Nonvolatile (SEE)
8Ah
2
12
2
11
2
10
2
9
2
8
2
7
2
6
2
5
bit7
bit0
This value will define the maximum allowed step for the upper 8 bits of IBIAS output during startup. Programming this value to 00h
cause the device to take single LSB (2
0) steps towards convergence. See the BIAS and MOD Output During Power-Up section for
details.
相關PDF資料 |
PDF描述 |
|---|---|
| DS1866Z/T&R | IC POT TRIM LOG 2.7-5.5V 8-SOIC |
| DS1867S-010+T&R | IC POT W/EEPROM DUAL 10K 16-SOIC |
| DS1868E-010/T&R | IC POT DIGITAL DUAL 10K 20-TSSOP |
| DS1869S-C10+T&R | IC RHEOSTAT DALLAST 8SOIC |
| DS1875T+T&R | IC SFP CTRLR/TRIPLEXER 38-TQFN |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1865T TR | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:PON Triplexer Control and Monitoring Circuit |
| DS1865T+ | 功能描述:電流和電力監(jiān)控器、調節(jié)器 PON Triplexer Cntrl & Monitoring Circuit RoHS:否 制造商:STMicroelectronics 產品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
| DS1865T+T&R | 制造商:Maxim Integrated Products 功能描述:TRIPLEXER CONTROL AND MONITORING CIRCUIT 1TX 1RX 1.25GBPS 28 - Tape and Reel 制造商:Maxim Integrated Products 功能描述:IC PON CONTROL TRI 28-TQFN 制造商:Maxim Integrated Products 功能描述:Current & Power Monitors & Regulators PON Triplexer Cntrl & Monitoring Circuit |
| DS1865T+T&R | 功能描述:電流和電力監(jiān)控器、調節(jié)器 PON Triplexer Cntrl & Monitoring Circuit RoHS:否 制造商:STMicroelectronics 產品:Current Regulators 電源電壓-最大:48 V 電源電壓-最小:5.5 V 工作溫度范圍:- 40 C to + 150 C 安裝風格:SMD/SMT 封裝 / 箱體:HPSO-8 封裝:Reel |
| DS1865T+TR | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:PON Triplexer Control and Monitoring Circuit |
發(fā)布緊急采購，3分鐘左右您將得到回復。