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參數(shù)資料
| 型號： | DS1877T+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 10/65頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CTLR/MON SFP 1-2CH 28TQFN |
| 產(chǎn)品培訓模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 2,500 |
| 類型： | SFP+ 控制器 |
| 輸入類型： | 邏輯 |
| 輸出類型： | 邏輯 |
| 接口： | I²C |
| 電流 - 電源： | 2.5mA |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 28-WFQFN 裸露焊盤 |
| 供應商設備封裝： | 28-TQFN-EP（5x5） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | 90-1877T+TRL |
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18
Maxim Integrated
SFP Controller for Dual Rx Interface
DS1877
Any time VCC is above POD, the I2C interface can be
used to determine if VCC is below the POA level. This is
accomplished by checking the RDYB bit in the STATUS
byte (Lower Memory, Register 6Eh). RDYB is set when
VCC is below POA; when VCC rises above POA, RDYB
is timed (within 500Fs) to go to 0, at which point the part
is fully functional.
For all device addresses sourced from EEPROM
(Table 02h, Register 8Bh), the default device address
is A2h until VCC exceeds POA, allowing the device
address to be recalled from the EEPROM.
Delta-Sigma Outputs
The device’s delta-sigma outputs are 10 bits. For illustra-
tive purposes, a 3-bit example is provided in Figure 8.
Each possible output of this 3-bit delta-sigma DAC is
provided in Figure 9.
In LUT mode the DACs are each controlled by an LUT
with high-temperature resolution and an OFFSET LUT
with lower temperature resolution. The high-resolution
LUTs each have 2NC resolutions. The OFFSET LUTs are
located in the upper eight registers (F8h–FFh, Table 04h)
of the table containing each high-resolution LUT. The
DAC values are determined as follows:
DAC value = DAC LUT + 4 x (DAC OFFSET LUT)
An example calculation for DAC1 is as follows:
Assumptions:
1) Temperature is +43NC
2) Table 04h (DAC OFFSET LUT), Register FCh = 2Ah
3) Table 04h (DAC LUT), Register AAh = 7Bh
Because the temperature is +43NC, the DAC LUT index
is AAh and the DAC1 OFFSET LUT index is FCh.
DAC1 = 7Bh + 4 x 2Ah = 123h = 291
When temperature controlled, the DACs are updated
after each temperature conversion. See Figure 10.
The reference input, REFIN, is the supply voltage for the
output buffer of all the DACs. The voltage connected to
REFIN must be able to support the edge rate require-
ments of the delta-sigma outputs. In a typical applica-
tion, a 0.1FF capacitor should be connected between
REFIN and ground.
Figure 8. Recommended RC Filter for DAC Outputs
Figure 9. 3-Bit (8-Position) Delta-Sigma Example
DS1877
DAC
3.24k
3.24k
0.01F
VOLTAGE OUTPUT
DS1877
DAC
1k
1k
0.1F
CURRENT SINK
2k
O
1
2
3
4
5
6
7
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| DS1878 | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:SFP+ Controller with Digital LDD Interface |
| DS1878T | 功能描述:ADC / DAC多通道 SFP+ Controller w/ MAX3946&3945 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| DS1878T TR | 制造商:MAXIM 制造商全稱:Maxim Integrated Products 功能描述:SFP+ Controller with Digital LDD Interface |
| DS1878T+ | 功能描述:ADC / DAC多通道 SFP+ Controller w/ MAX3946&3945 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
| DS1878T+T | 功能描述:ADC / DAC多通道 SFP+ Controller w/ MAX3946&3945 RoHS:否 制造商:Texas Instruments 轉(zhuǎn)換速率: 分辨率:8 bit 接口類型:SPI 電壓參考: 電源電壓-最大:3.6 V 電源電壓-最小:2 V 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:VQFN-40 |
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