參數(shù)資料
型號(hào)： DS2141AQN
廠商： Maxim Integrated Products
文件頁(yè)數(shù)： 18/39頁(yè)
文件大?。?/td> 0K
描述： IC CONTROLLER T1 5V 44-PLCC
產(chǎn)品培訓(xùn)模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝： 26
控制器類(lèi)型： T1 控制器
接口： 并行/串行
電源電壓： 4.5 V ~ 5.5 V
電流 - 電源： 10mA
工作溫度： 0°C ~ 70°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 44-LCC（J 形引線(xiàn)）
供應(yīng)商設(shè)備封裝： 44-PLCC（16.59x16.59）
包裝： 管件
DS2141A
25 of 39
9.0 CLOCK BLOCKING REGISTERS
The Receive Channel Blocking Registers (RCBR1/RCBR2/RCBR3) and the Transmit Channel Blocking
Registers (TCBR1/TCBR2/TCBR3) control the RCHBLK and TCHBLK pins respectively. The
RCHBLK and TCHCLK pins are user-programmable outputs that can be forced either high or low during
individual channels. These outputs can be used to block clocks to a USART or LAPD controller in
Fractional T1, E1 to T1, or ISDN-PRI applications. When the appropriate bits are set to a 1, the RCHBLK
and TCHCLK pins will be held high during the entire corresponding channel time. See the timing in
Section 13 for an example.
RCBR1/RCBR2/RCBR3:
RECEIVE CHANNEL BLOCKING REGISTERS (6Ch to 6Eh)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
RCBR1 (6C)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
RCBR2 (6D)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
RCBR3 (6E)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
CH1
RCBR3.7
RCBR1.0
Receive Channel Blocking Registers.
0=force the RCHBLK pin to remain low during this channel time.
1=force the RCHBLK pin high during this channel time.
TCBR1/TCBR2/TCBR3:
TRANSMIT CHANNEL BLOCKING REGISTERS (32h to 34h)
(MSB)
(LSB)
CH8
CH7
CH6
CH5
CH4
CH3
CH2
CH1
TCBR1 (32)
CH16
CH15
CH14
CH13
CH12
CH11
CH10
CH9
TCBR2 (33)
CH24
CH23
CH22
CH21
CH20
CH19
CH18
CH17
TCBR3 (34)
SYMBOL
POSITION
NAME AND DESCRIPTION
CH24
CH1
RCBR3.7
RCBR1.0
Transmit Channel Blocking Registers.
0=force the TCHBLK pin to remain low during this channel time.
1=force the TCHBLK pin high during this channel time.
10.0 ELASTIC STORES OPERATION
The DS2141A has two onboard two-frame (386 bits) elastic stores. These elastic stores have two main
purposes. First, they can be used to rate convert the T1 data stream to 2.048 Mbps (or a multiple of 2.048
Mbps) which is the E1 rate. Secondly, they can be used to absorb the differences in frequency and phase
between the T1 data stream and an asynchronous (i.e., not frequency locked) backplane clock. Both
elastic stores contain full controlled slip capability which is necessary for this second purpose. The
receive side elastic store can be enabled via CCR1.2 and the transmit side elastic store is enabled via
CCR1.7.
10.1 Receive Side
If the receive side elastic store is enabled (CCR1.2 = 1), then the user must provide either a 1.544 MHz
(CCR1.3 = 0) or 2.048 MHz (CCR1.3 = 1) clock at the SYSCLK pin. The user has the option of either
providing a frame sync at the RFSYNC pin (RCR2.3 = 1) or having the RFSYNC pin provide a pulse on
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DS2143 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2143N 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS2143Q 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
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