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參數(shù)資料
| 型號： | DS2141AQN |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 5/39頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CONTROLLER T1 5V 44-PLCC |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標準包裝： | 26 |
| 控制器類型： | T1 控制器 |
| 接口： | 并行/串行 |
| 電源電壓： | 4.5 V ~ 5.5 V |
| 電流 - 電源： | 10mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 44-LCC（J 形引線） |
| 供應(yīng)商設(shè)備封裝： | 44-PLCC（16.59x16.59） |
| 包裝： | 管件 |
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DS2141A
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4.0 STATUS AND INFORMATION REGISTERS
There is a set of three registers that contain information on the current real time status of the DS2141A:
Status Register 1 (SR1), Status Register 2 (SR2), and the Receive Information Register (RIR). When a
particular event has occurred (or is occurring), the appropriate bit in one of these three registers will be
set to a 1. All of the bits in these registers operate in a latched fashion. This means that if an event occurs
and a bit is set to a 1 in any of the registers, it will remain set until the user reads that bit. The bit will be
cleared when it is read and it will not be set again until the event has occurred again (or in the case of
RLOS, if loss of sync is still present).
The user will always precede a read of these registers with a write. The byte written to the register will
inform the DS2141A which bits the user wishes to read and have cleared. The user will write a byte to
one of these three registers, with a 1 in the bit positions he or she wishes to read and a 0 in the bit
positions he or she does not wish to obtain the latest information on. When a 1 is written to a bit location,
the read register will be updated with current value and it will be cleared. When a 0 is written to a bit
position, the read register will not be updated and the previous value will be held. A write to the status
and information registers will be immediately followed by a read of the same register. The read result
should be logically AND’ed with the mask byte that was just written and this value should be written
back into the same register to insure that the bit does indeed clear. This second write is necessary because
the alarms and events in the status registers occur asynchronously in respect to their access via the
parallel port. This scheme allows an external microcontroller or microprocessor to individually poll
certain bits without disturbing the other bits in the register. This operation is key in controlling the
DS2141A with higher-order software languages.
The SR1 and SR2 registers have the unique ability to initiate a hardware interrupt via the INT1 and INT2
pins respectively. Each of the alarms and events in the SR1 and SR2 can be either masked or unmasked
from the interrupt pins via the Interrupt Mask Register 1 (IMR1) and Interrupt Mask Register 2 (IMR2)
respectively.
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| DS2141AQN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC T1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E1 Controller w/Elastic Store RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143Q | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS2143Q/T&R | 制造商:Maxim Integrated Products 功能描述:IC CONTROLLER E1 5V LP 44-PLCC 制造商:Maxim Integrated Products 功能描述:Network Controller & Processor ICs E1 Controller w/Elastic Store |
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