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參數(shù)資料
| 型號： | DS21FT44 |
| 廠商： | MAXIM INTEGRATED PRODUCTS INC |
| 元件分類： | Digital Transmission Controller |
| 英文描述： | DATACOM, FRAMER, PBGA300 |
| 封裝： | 27 X 27 MM, 1.27 MM PITCH, MCMBGA-300 |
| 文件頁數(shù)： | 88/117頁 |
| 文件大小： | 691K |
| 代理商： | DS21FT44 |
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DS21FT44/DS21FF44
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register. The read result should be logically AND’ed with the mask byte that was just written and this
value should be written back into the same register to insure that bit does indeed clear. This second write
step is necessary because the alarms and events in the status registers occur asynchronously in respect to
their access by the parallel port. This write-read-write (for polled-driven access) or write–read (for
interrupt driven access) scheme allows an external microcontroller or microprocessor to individually poll
certain bits without disturbing the other bits in the register. This operation is key in controlling the
DS21Q44 with higher order software languages.
Like the SR1 and SR2 status registers, the HSR register has the unique ability to initiate a hardware
interrupt by the INT* output pin. Each of the events in the HSR can be either masked or unmasked from
the interrupt pin by the HDLC Interrupt Mask Register (HIMR). Interrupts will force the INT* pin low
when the event occurs. The INT* pin will be allowed to return high (if no other interrupts are present)
when the user reads the event bit that caused the interrupt to occur.
19.3. BASIC OPERATION DETAILS
As a basic guideline for interpreting and sending HDLC messages, the following sequences can be
applied:
Receive a HDLC Message
1) Enable RPS interrupts.
2) Wait for interrupt to occur.
3) Disable RPS interrupt and enable either RPE, RNE, or RHALF interrupt.
4) Read RHIR to obtain REMPTY status.
a) If REMPTY = 0, then record OBYTE, CBYTE, and POK bits and then read the FIFO
a1) If CBYTE = 0 then skip to Step 5
a2) If CBYTE = 1 then skip to Step 7
b) If REMPTY = 1, then skip to Step 6
5) Repeat Step 4.
6) Wait for interrupt, skip to Step 4.
7) If POK = 0, then discard whole packet, if POK = 1, accept the packet.
8) Disable RPE, RNE, or RHALF interrupt, enable RPS interrupt and return to Step 1.
Transmit a HDLC Message
1) Make sure HDLC controller is done sending any previous messages and is current sending flags by
checking that the FIFO is empty by reading the TEMPTY status bit in the THIR register.
2) Enable either the THALF or TNF interrupt.
3) Read THIR to obtain TFULL status.
a) If TFULL = 0, then write a byte into the FIFO and skip to next step (special case occurs
when the last byte is to be written, in this case set TEOM = 1 before writing the byte and
then skip to Step 6)
b) If TFULL = 1, then skip to Step 5
4) Repeat Step 3.
5) Wait for interrupt, skip to Step 3.
6) Disable THALF or TNF interrupt and enable TMEND interrupt.
7) Wait for an interrupt, then read TUDR status bit to make sure packet was transmitted correctly.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21FT44+ | 功能描述:網(wǎng)絡控制器與處理器 IC 4X3 E1 Framer E1 Framer E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44N | 功能描述:網(wǎng)絡控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21FT44N+ | 功能描述:網(wǎng)絡控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q348 | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q348B | 功能描述:網(wǎng)絡控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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