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參數(shù)資料
| 型號(hào)： | DS21FT44N+ |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 34/117頁 |
| 文件大小： | 0K |
| 描述： | IC FRAMER 4X4 16CH 300-BGA |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 40 |
| 控制器類型： | E1 調(diào)幀器 |
| 接口： | 并行/串行 |
| 電源電壓： | 2.97 V ~ 3.63 V |
| 電流 - 電源： | 225mA |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 300-BBGA |
| 供應(yīng)商設(shè)備封裝： | 300-PBGA（27x27） |
| 包裝： | 管件 |
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DS21FT44/DS21FF44
23 of 117
Signal Name:
RMSYNC
Signal Description:
Receive Multiframe Sync
Signal Type:
Output
An extracted pulse, one RSYSCLK wide, is output at this pin, which identifies multiframe boundaries. If
the receive side elastic store is disabled, then this output will output multiframe boundaries associated
with RCLK. This function is available when FMS = 1 (DS21Q43 emulation). This signal is not bonded
out in the DS21FF44/DS21FT44.
Signal Name:
RSYSCLK
Signal Description:
Receive System Clock
Signal Type:
Input
1.544MHz or 2.048MHz clock. Only used when the elastic store function is enabled. Should be
connected low in applications that do not use the elastic store. Can be burst at rates up to 8.192MHz. This
pin is connected to the TSYSCLK signal in the DS21FF44/DS21FT44.
Signal Name:
RSIG
Signal Description:
Receive Signaling Output
Signal Type:
Output
Outputs signaling bits in a PCM format. Updated on rising edges of RCLK when the receive side elastic
store is disabled. Updated on the rising edges of RSYSCLK when the receive side elastic store is enabled.
This function is available when FMS = 0. FMS is connected to ground for the DS21FF44/DS21FT44.
Signal Name:
RLOS/LOTC
Signal Description:
Receive Loss of Sync / Loss of Transmit Clock
Signal Type:
Output
A dual function output that is controlled by the TCR2.0 control bit. This pin can be programmed to either
toggle high when the synchronizer is searching for the frame and multiframe or to toggle high if the
TCLK pin has not been toggled for 5s. This function is available when FMS = 1 (DS21Q43 emulation).
This signal is not bonded out in the DS21FF44/DS21FT44.
Signal Name:
CLKSI
Signal Description:
8MHz Clock Reference
Signal Type:
Input
A 2.048MHz reference clock used in the generation of 8MCLK. This function is available when
FMS = 0. FMS is connected to ground for the DS21FF44/DS21FT44.
Signal Name:
8MCLK
Signal Description:
8 MHz Clock
Signal Type:
Output
An 8.192MHz output clock that is referenced to the clock that is input at the CLKSI pin. This function is
available when FMS = 0. FMS is connected to ground for the DS21FF44/DS21FT44.
Signal Name:
RPOS
Signal Description:
Receive Positive Data Input
Signal Type:
Input
Sampled on the falling edge of RCLK for data to be clocked through the receive side framer. RPOS and
RNEG can be connected together for an NRZ interface. Connecting RPOS to RNEG disables the bipolar
violation monitoring circuitry.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21FT44N+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC 4x4 16/4x3 12 Chnl E1/E1 Framer RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q348 | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q348B | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q348DK | 功能描述:網(wǎng)絡(luò)開發(fā)工具 RoHS:否 制造商:Rabbit Semiconductor 產(chǎn)品:Development Kits 類型:Ethernet to Wi-Fi Bridges 工具用于評(píng)估:RCM6600W 數(shù)據(jù)速率:20 Mbps, 40 Mbps 接口類型:802.11 b/g, Ethernet 工作電源電壓:3.3 V |
| DS21Q348N | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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