參數(shù)資料
型號: DS21Q48A3N
廠商: Maxim Integrated Products
文件頁數(shù): 46/73頁
文件大?。?/td> 0K
描述: IC LIU 5V E1/T1/J1 144-BGA
產品培訓模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝: 1
類型: 線路接口裝置(LIU)
規(guī)程: E1
電源電壓: 4.75 V ~ 5.25 V
安裝類型: 表面貼裝
封裝/外殼: 144-BBGA
供應商設備封裝: 144-PBGA(17x17)
包裝: 管件
DS2148/DS21Q48
50 of 73
Figure 7-2. Protected Interface Using Internal Receive Termination
NOTES:
1) All resistor values are ±1%.
2) C1 = C2 = 0.1F.
3) S is a 6V transient suppresser.
4) D1 to D8 are Schottky diodes.
5) The fuses are optional to prevent AC power line crosses from compromising the transformers.
6) Rp resistors exist to keep the Fuses from opening during a surge. If they are used, then the 60
receive termination resistance must
be adjusted to match the line impedance.
7) The Rt resistors are used to increase the transmitter return loss (Table 7-1). No return loss is required for T1 applications.
8) The transmit transformer turns ratio (N) would be 1:1.36 for 5V operation.
9) The 68F is used to keep the local power plane potential within tolerance during a surge.
RTIP
RRING
TTIP
TRING
Receive
Line
N:1
(larger winding
toward the network)
DS2148
0.47uF
(non-
polarized)
VDD (21)
VSS (22)
0.1uF
VDD (36)
VSS (35)
0.1uF
+VDD
0.01uF
2.048MHz
(this clock can also
be 1.544MHz for T1
only applications)
MCLK
+VDD
S
C1
D1
D2
D3
D4
1:1
Rp
Fuse
Rp
Fuse
+VDD
C2
D5
D6
D7
D8
Rt
68uF
S
(optional)
Transmit
Line
Rp
Fuse
Rp
Fuse
(optional)
10uF
0.1uF
60
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