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參數(shù)資料
| 型號(hào)： | DS21Q50L |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 24/87頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC TRANSCEIVER E1 QUAD 100-LQFP |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS |
| 產(chǎn)品變化通告： | Product Discontinuation 20/Feb/2012 |
| 標(biāo)準(zhǔn)包裝： | 90 |
| 功能： | 收發(fā)器 |
| 接口： | E1 |
| 電路數(shù)： | 4 |
| 電源電壓： | 3.14 V ~ 3.47 V |
| 電流 - 電源： | 230mA |
| 工作溫度： | 0°C ~ 70°C |
| 安裝類(lèi)型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤(pán) |
| 包括： | AIS 警報(bào)檢測(cè)器和發(fā)生器，回送功能，PRBS 發(fā)生器 / 檢測(cè)器，遠(yuǎn)程檢測(cè)器和發(fā)生器 |
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DS21Q50
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4.4 Remote Loopback
When CCR4.7 is set to 1, the DS21Q50 is forced into remote loopback (RLB). In this loopback, data
input through the RTIP and RRING pins is transmitted back to the TTIP and TRING pins. Data continues
to pass through the receive framer of the DS21Q50 as it would normally and the data from the transmit
formatter is ignored (Figure 1-1).
4.5 Local Loopback
When CCR4.6 is set to 1, the DS21Q50 is forced into local loopback (LLB). In this loopback, data
continues to be transmitted as normal. Data being received at RTIP and RRING is replaced with the data
being transmitted. Data in this loopback passes through the jitter attenuator (Figure 1-1).
Register Name:
CCR4
Register Description:
Common Control Register 4
Register Address:
15 Hex
Bit
7
6
5
4
3
2
1
0
Name
LIRST
RESA
RESR
RCM4
RCM3
RCM2
RCM1
RCM0
NAME
BIT
FUNCTION
LIRST
7
Line Interface Reset. Setting this bit from 0 to 1 initiates an internal reset that affects the
clock recovery state machine and jitter attenuator. Normally this bit is only toggled on
power-up. Must be cleared and set again for a subsequent reset.
RESA
6
Receive Elastic Store Align. Setting this bit from a 0 to 1 can force the receive elastic
store’s write/read pointers to a minim separation of half a frame. No action is taken if the
pointer separation is already greater or equal to half a frame. If pointer separation is less
than half a frame, the command is executed and data is disrupted. Should be toggled after
SYSCLK has been applied and is stable. Must be cleared and set again for a subsequent
align. See Section 13 for details.
RESR
5
Receive Elastic Store Reset. Setting this bit from a 0 to 1 forces the receive elastic store to
a depth of one frame. Receive data is lost during the reset. Should be toggled after
SYSCLK has been applied and is stable. Must be cleared and set again for a subsequent
reset. See Section 13 for details.
RCM4
4
Receive Channel Monitor Bit 4. MSB of a channel decode that determines which receive
channel data appears in the RDS0M register. See Section 6 for details.
RCM3
3
Receive Channel Monitor Bit 3
RCM2
2
Receive Channel Monitor Bit 2
RCM1
1
Receive Channel Monitor Bit 1
RCM0
0
Receive Channel Monitor Bit 0. LSB of the channel decode.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DS21Q50L+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q50L-C01 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Maxim Integrated Products 功能描述: |
| DS21Q50LN | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q50LN+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| DS21Q50L-W+ | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Quad E1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
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