DS21Q50
82 of 87
21.4 Receive AC Characteristics
AC CHARACTERISTICS—RECEIVER
(VDD = 3.3.0V
±5%, TA = 0°C to +70°C for DS21Q50L; VDD = 3.3.0V ± 5%, TA = -40°C to +85°C for DS21Q50LN.)
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
SYSCLK Period (Note 1)
tSP
122
488
ns
tSH
50
SYSCLK Pulse Width
tSL
50
ns
RSYNC Setup to SYSCLK
Falling
tSU
20
tSH - 5
ns
RSYNC Pulse Width
tPW
50
ns
Delay RCLK to RSER Valid
tD1
50
ns
Delay RCLK to RSYNC,
OUTA, OUTB
tD2
50
ns
Delay SYSCLK to RSER Valid
tD3
50
ns
Delay SYSCLK to RSYNC,
OUTA, OUTB
tD4
50
ns
Note 1: SYSCLK = 2.048MHz.
Figure 21-9. Receive AC Timing (Receive Elastic Store Disabled)
tD1
3
tD2
RSER
RSYNC
OUTA / OUTB (*RCLK)
MSB of
Channel 1
2
OUTA / OUTB
4
OUTA / OUTB
5
OUTA / OUTB (RCLK)
1
NOTE 1: OUTA OR OUTB CONFIGURED TO OUTPUT RCLK (NONINVERTED).
NOTE 2: OUTA OR OUTB CONFIGURED TO OUTPUT RCLK (INVERTED).
NOTE 3: RSYNC IS IN THE OUTPUT MODE (RCR1.5 = 0).
NOTE 4: OUTA OR OUTB CONFIGURED TO OUTPUT RFSYNC, CRC4 MF SYNC, OR CAS MF SYNC (NONINVERTED).
NOTE 5: OUTA OR OUTB CONFIGURED TO OUTPUT RFSYNC, CRC4 MF SYNC, OR CAS MF SYNC (INVERTED).