參數(shù)資料
型號： DS26324DK
廠商： Maxim Integrated Products
文件頁數(shù)： 87/120頁
文件大?。?/td> 0K
描述： KIT DESIGN FOR G549DS26324
產(chǎn)品培訓模塊： Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標準包裝： 1
主要目的： 電信，線路接口單元（LIU）
已用 IC / 零件： G549DS26324
已供物品： 板，線纜，電源
DS26324 3.3V, 16-Channel, E1/T1/J1 Short-Haul Line Interface Unit
69 of 120
Register Name:
MC
Register Description:
Master Clock Select
Register Address:
06h
Bit #
7
6
5
4
3
2
1
0
Name
PCLKI1
PCLKI0
TECLKE
CLKAE
MPS1
MPS0
FREQS
PLLE
Default
0
Bits 7 and 6: PLL Clock Input [1:0] (PCLKI[1:0]). These bits select the input into to the PLL.
00: MCLK is used.
01: RCLK1 to 8 is used based on the selection in register CCR.
10: RCLK9 to 16 is used based on the selection in register CCR.
11: Reserved.
Bit 5: T1/E1 Clock Enable (TECLKE). When this bit is set the TECLK output is enabled. If not set TECLK will be
disabled and the TECLK output is a LOS output. TECLK requires PLLE to be set for correct functionality.
Bit 4: Clock A Enable (CLKAE). When this bit is set the CLKA output is enabled. If not set CLKA will be disabled
and the CLKA output is a LOS output. CLKA requires PLLE to be set for correct functionality.
Bits 3 and 2: Master Period Select [1:0] (MPS[1:0]). These bits MPS[1:0] selects the external MCLK frequency
for the DS26324. See Table 6-15 for details. This register when written to will also controller functionality of
Channels 9 to 16.
Bit 1: Frequency Select (FREQS). In conjunction with MPS[1:0] selects the external MCLK frequency for the
DS26324. If this bit is set the external Master clock can be 1.544MHz or multiple thereof. If not set the external
master clock can be 2.048MHz or multiple thereof. See Table 6-15 for details. This register when written to will also
controller functionality of Channels 9 to 16.
Bit 0: Phase Lock Loop Enable (PLLE). When this bit is set the phase lock loop is enabled. If not set MCLK will
be the applied input clock.
Table 6-15. DS26324 MCLK Selections
PLLE
MPS1, MPS0
MCLK,
MHz ±50ppm
FREQS
MODE
0
xx
1.544
x
T1
0
xx
2.048
x
E1
1
00
1.544
1
T1/J1 or E1
1
01
3.088
1
T1/J1 or E1
1
10
6.176
1
T1/J1 or E1
1
11
12.352
1
T1/J1 or E1
1
00
2.048
0
T1/J1 or E1
1
01
4.096
0
T1/J1 or E1
1
10
8.192
0
T1/J1 or E1
1
11
16.384
0
T1/J1 or E1
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS26324G 功能描述:電信集成電路 3.3V E1/T1/J1 16Ch Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324G+ 功能描述:電信集成電路 3.3V E1/T1/J1 16Ch Short Haul Octal LIU RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GA2 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GA2+ 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
DS26324GA2+W 功能描述:電信集成電路 RoHS:否 制造商:STMicroelectronics 類型:Telecom IC - Various 工作電源電壓:4.75 V to 5.25 V 電源電流: 工作溫度范圍:- 40 C to + 85 C 安裝風格:SMD/SMT 封裝 / 箱體:PQFP-100 封裝:Tray
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