DS3181/DS3182/DS3183/DS3184
52
PIN
TYPE
FUNCTION
ROHSOFn
O
Receive Overhead Start Of Frame
ROHSOFn: When the port framer is configured for one of the DS3 or E3 framing
modes this signal is used to mark the start of a DS3 or E3 overhead sequence on the
ROHn pins. In T3 mode, the first X-bit is marked. In G.751 E3 mode, the first bit of the
FAS word is marked. In G.832 E3 mode, the first bit of the FA1 byte is marked. The
sequence starts on the same high to low transition of the ROHCLKn clock that this
signal is high. This signal is updated at the same time as the ROHCLKn signal
transitions high to low.
This signal can be inverted.
DS3/E3 SERIAL DATA, PLCP AND FRACTIONAL DS3/E3 OVERHEAD INTERFACE
TCLKIn
I
Transmit Line Clock Input
TCLKIn: This clock is typically used for the reference clock for the TOHMIn / TSOFIn,
/ TFOHENOn signals but can also be used as the reference for the TPOSn / TDATn
and TNEGn / TOHMOn signals. This clock is not used when the part is in loop time
mode or the CLAD clocks are used as the transmit clock source.
(PORT.CR3.CLADC)
This input signal can be inverted.
o
DS3: 44.736 MHz +20 ppm
o
E3: 34.368 MHz +20 ppm
o
CC52: 52 MHz +20 ppm
TSOFIn /
TOHMIn
I
Transmit Start Of Frame Input / OH Mask Input. See
Table 10-20.TSOFIn: When the port framer is configured for any of the DS3 or E3 non “-OHM”
framed modes, this signal can be used to align the start of the DS3 or E3 frames on
the TSER pin to an external signal. In the fractional mode, the TSOFIn signal can be
used to align the start of frame signal position on the TSERn/TOHn
pin to the rising edge of a signal on this pin. The signal edge does not need to occur
on every frame and can be tied high or low. The signal is sampled on the positive
clock edge of the referenced clock pin if the clock pin signal is not inverted, otherwise
it is sampled on the falling edge of the clock. The signal is typically referenced to the
TCLKIn transmit clock input pins, but it can be referenced to the TLCLKn, TCLKOn,
RCLKOn and RLCLKn clock pins.
This signal can be inverted.
TOHMIn: When the port framer is configured for one of the “- OHM” modes, this
signal is used to mark clock periods when valid data bits are available on the TDATn
output pins. When this signal is low, valid data bits will be available on the TDATn
output pins three clock periods later. This signal precedes the signal on TDATn and
TOHMOn by three clock periods. The signal is sampled on the positive clock edge of
the referenced clock pin if the clock pin signal is not inverted, otherwise it is sampled
on the falling edge of the clock. The signal is typically referenced to the TCLKIn
transmit clock input pins, but it can be referenced to the TLCLKn, TCLKOn, RCLKOn
and RLCLKn clock pins.
This signal can be inverted.
TSERn /
TPOHn /
TFOHn /
I
Transmit Serial Data / PLCP Overhead / Fractional Overhead. See
Table 10-21.TSERn: When the port framer is configured for Flexible Fractional mode, this pin is
used as the source of the DS3/E3 payload data. The signal is sampled on the positive
clock edge of the referenced clock pin if the clock pin signal is not inverted, otherwise
it is sampled on the falling edge of the clock. The signal is typically referenced to the
TCLKIn transmit clock input pins, but it can be referenced to the TLCLKn, TCLKOn /
TGCLKn, RCLKOn and RLCLKn clock pins
This signal can be inverted.
o
DS3: 44.736 Mbps +20ppm
o
E3: 34.368 Mbps +20ppm
o
CC52: 52 Mbps +20ppm
TPOHn: When the port framer is configured for one of the DS3 or E3 PLCP framing
modes, and the port is enabled, this signal will be used to over-write the DS3 or E3