參數(shù)資料
型號: DS33M33N+
廠商: Maxim Integrated Products
文件頁數(shù): 2/21頁
文件大?。?/td> 0K
描述: IC MAPPER ETHERNET 256CSBGA
產(chǎn)品培訓(xùn)模塊: Lead (SnPb) Finish for COTS
Obsolescence Mitigation Program
標(biāo)準(zhǔn)包裝: 90
應(yīng)用: 數(shù)據(jù)傳輸
接口: SPI
電源電壓: 1.8V,2.5V,3.3V
封裝/外殼: 256-BGA,CSBGA
供應(yīng)商設(shè)備封裝: 256-CSBGA(17x17)
包裝: 托盤
安裝類型: 表面貼裝
DS33M30/M31/M33 DATA SHEET
Rev: 010809
10 of 21
1.3.7.2 STS-1/AU-3/TU-3 Pointer Interpreter
Per STS-1/AU-3/TU-3 tributary pointer interpretation using the outbound Drop STS-3/STM-1 clock
Pointer interpretation per Telcordia GR-253-CORE and ITU G.707 specifications
Extraction of STS-1, AU-3, or TU-3 pointer bytes (H1, H2, and H3)
Detection of defects including, LOP and “all-ones” pointer (AIS-P)
Detection and accumulation of incoming pointer increments, decrements, changes, and new pointers
1.3.8 STS-1/VC-3 Path Termination (DS33M31 and DS33M33 only)
1.3.8.1 STS-1/VC-3 Path Overhead Generation
Generation of all POH bytes including Path trace ID (J1), Path BIP-8 (B3), Path signal label (C2), Path
status (G1), Path user byte (F2), Path concatenation indicator (H4), and Path growth (Z3, Z4, and Z5)
All POH bytes can be inserted from either the associated inbound Add STS-1/VC-3 POH input port or
software accessible internal registers
Automatic or manual generation of PTE alarm defects including RDI-P and ERDI-P
Programmable error insertion of B3 and REI errors
Insertion of HDLC data stream into path user byte (F2)
Insertion of path trace ID into path trace byte (J1)
1.3.8.2 STS-1/VC-3 Path Overhead Reception and Monitoring
Termination of all POH bytes (per PTE requirement) including Path trace ID (J1), Path BIP-8 (B3), path
signal label (C2), Path status (G1), Path user byte (F2), path concatenation indicator (H4), and Path growth
(Z3, Z4, and Z5)
All POH bytes presented on the associated STS-1 SPE/VC-3 POH output port and software accessible
internal registers
Detection of PTE defects: PLM-P, PLU-P, UNEQ-P, PDI-P, RDI-P, and Enhanced RDI-P (ERDI-P)
Detection and accumulation of path B3 and path REI errors (part of G1) on a bit or block basis
Two POH B3 bit error rate (BER) measurement circuits with separate software programmable detection
and clearing thresholds
Extraction of HDLC data stream from path user byte (F2)
Extraction of path trace ID from path trace byte (J1)
1.3.8.3 STS-1/VC-3 Synchronizer
Synchronization of STS-1 SPE/VC-3 to accommodate asynchronous payload through pointer justifications
Accommodation of frequency offsets up to +100ppm between the SONET/SDH Telecom Bus reference
frequency of 77.76MHz and the line/tributary STS-1 frequency 51.84MHz
Elastic store overflow and underflow conditions
Selectable lock and fast lock modes of operation
Programmable frequency out of range indication (±5, ±10, ±20, or ±40ppm).
SONET mapping jitter conforming to GR-253 and GR-499 and SDH mapping jitter compliant to ITU G.825e
and O.172e
1.3.8.4 STS-1 SPE Payload Mapping
Each STS-1 SPE can be mapped with Asynchronous DS3/E3 or Ethernet traffic. These two mapping
modes are mutually exclusive.
1.3.8.5 STS-1 SPE Ethernet Mapping/Demapping
Mapping of Ethernet packets into STS-1 SPE
1.3.8.6 Async DS3/E3 Demapper/Desynchronizer
Extraction of DS3/E3 data stream from an STS-1 SPE compliant to Telcordia GR-253 or VC-3 compliant to
ITU G.707
Generation of a nominal rate E3 (34.368MHz) or DS3 (44.736MHz)
Standard SONET STS-1 demapping for a DS3/E3 conforming with Telcordia GR-253 and GR-499
Standard SDH VC-3 demapping for a DS3/E3 conforming to ITU-T G.707, G.825e, and O.172e
All combinations of DS3 or E3 demapping configuration from STS-1, AU-3, or TU-3/AU-4 are possible
Software configuration for SONET/SDH demapping on a per tributary basis
相關(guān)PDF資料
PDF描述
DS33R11+CJ2 IC ETH TXRX T1/E1/J1 256-BGA
DS33R41+ IC TXRX ETHERNET MAP 400-BGA
DS33W11DK+ IC MAPPING ETHERNET 256-CSBGA
DS33Z11+UNUSED IC ETHERNET MAPPER 169-CSBGA
DS33Z44+ IC MAPPER ETHERNET 256CSBGA
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DS33M33N+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Ethernet Over SONET/SDH Mapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS33M33N+W 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Ethernet Over SONET/SDH Mapper RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS33R11 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS33R11+ 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray
DS33R11+CJ2 功能描述:網(wǎng)絡(luò)控制器與處理器 IC E-net Mapper w/Int T1/E1/J1 Transceiver RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流(最大值):595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray