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參數(shù)資料
| 型號(hào)： | DS3510T+T&R |
| 廠商： | Maxim Integrated Products |
| 文件頁(yè)數(shù)： | 8/17頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | IC I2C GAMMA/VCOM BUFF 48-TQFN |
| 產(chǎn)品培訓(xùn)模塊： | Lead (SnPb) Finish for COTS Obsolescence Mitigation Program |
| 標(biāo)準(zhǔn)包裝： | 2,500 |
| 應(yīng)用： | TFT-LCD 面板：伽瑪緩沖器，VCOM 驅(qū)動(dòng)器 |
| 輸出類型： | 滿擺幅 |
| 電路數(shù)： | 10 |
| 電流 - 電源： | 6.7mA |
| 電流 - 輸出 / 通道： | 4mA |
| 電壓 - 電源，單路/雙路(±)： | 9 V ~ 15 V |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤(pán) |
| 供應(yīng)商設(shè)備封裝： | 48-TQFN-EP（7x7） |
| 包裝： | 帶卷 (TR) |
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DS3510
EEPROM write cycles: The DS3510’s EEPROM write
cycles are specified in the
Nonvolatile Memory
Characteristics table. The specification shown is at the
worst-case temperature (hot) as well as at room tem-
perature.
Reading a single byte from a slave: Unlike the write
operation that uses the specified memory address byte
to define where the data is to be written, the read opera-
tion occurs at the present value of the memory address
counter. To read a single byte from the slave, the master
generates a START condition, writes the slave address
byte with R/W = 1, reads the data byte with a NACK to
indicate the end of the transfer, and generates a STOP
condition. However, since requiring the master to keep
track of the memory address counter is impractical, the
following method should be used to perform reads from
a specified memory location.
Manipulating the address counter for reads: A
dummy write cycle can be used to force the address
counter to a particular value. To do this the master gen-
erates a START condition, writes the slave address
byte (R/W = 0), writes the memory address where it
desires to read, generates a repeated START condi-
tion, writes the slave address byte (R/W = 1), reads
data with ACK or NACK as applicable, and generates a
STOP condition. Recall that the master must NACK the
last byte to inform the slave that no additional bytes will
be read.
See Figure 6 for I2C communication examples.
Reading multiple bytes from a slave: The read opera-
tion can be used to read multiple bytes with a single
transfer. When reading bytes from the slave, the master
simply ACKs the data byte if it desires to read another
byte before terminating the transaction. After the mas-
ter reads the last byte, it must NACK to indicate the end
of the transfer and generates a STOP condition.
I2C Gamma and VCOM Buffer with EEPROM
SLAVE
ADDRESS*
START
1
0
A0
R/W
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MSB
LSB
MSB
LSB
MSB
LSB
b7
b6
b5
b4
b3
b2
b1
b0
READ/
WRITE
REGISTER ADDRESS
b7
b6
b5
b4
b3
b2
b1
b0
DATA
STOP
SINGLE-BYTE WRITE
-WRITE LATCH A
GM8 TO 00h
SINGLE-BYTE WRITE
-ENTER STANDBY MODE
SINGLE-BYTE READ
-READ LATCH A GM2
TWO-BYTE WRITE
- WRITE 10h AND 11h TO 80h
START
REPEATED
START
C1h
DATA
MASTER
NACK
STOP
1 1000000
00000 010
02h
11000 001
1 1000000
00001 000
C0h
08h
OOh
STOP
START 1 1000000
01010 001
C0h
51h
STOP
I/O STATUS
01h
EXAMPLE I2C TRANSACTIONS (WHEN A0 IS CONNECTED TO GND)
TYPICAL I2C WRITE TRANSACTION
*THE SLAVE ADDRESS IS DETERMINED BY ADDRESS PIN A0.
00 000 000
0 00 0 0 0 0 1
C0h
A)
C)
B)
D)
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
START 1 1000000
00010 000
C0h
10h
STOP
80h
1 00 0 0 0 0 0
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
80h
1 00 0 0 0 0 0
SLAVE
ACK
TWO-BYTE READ
- READ 10h AND 11h
E)
START 1 1000000
00010 000
C0h
10h
STOP
SLAVE
ACK
SLAVE
ACK
SLAVE
ACK
MASTER
ACK
C1h
DATA
1 10 0 0 0 0 1
MASTER
NACK
REPEATED
START
Figure 6. I2C Communication Examples
16
______________________________________________________________________________________
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