DS87C530
022197 11/40
MEMORY RESOURCES
Like the 8051, the DS87C530 uses three memory
areas. These are program (ROM), data (RAM), and
scratchpad RAM (registers). The DS87C530 contains
on–chip quantities of all three areas.
The total memory configuration of the DS87C530 is
16KB of ROM, 1KB of data SRAM and 256 bytes of
scratchpad or direct RAM. The 1KB of data space
SRAM is read/write accessible and is memory mapped.
This on–chip SRAM is reached by the MOVX instruc-
tion. It is not used for executable memory. The scratch-
pad area is 256 bytes of register mapped RAM and is
identical to the RAM found on the 80C52. There is no
conflict or overlap among the 256 bytes and the 1KB as
they use different addressing modes and separate
instructions.
OPERATIONAL CONSIDERATION
The erasure window should be covered without regard
to the programmed/unprogrammed state of the
EPROM. Otherwise, the device may not meet the AC
and DC parameters listed in the datasheet.
PROGRAM MEMORY ACCESS
On–chip ROM begins at address 0000h and is contigu-
ous through 3FFFh (16KB). Exceeding the maximum
address of on–chip ROM will cause the DS87C530 to
access off–chip memory. However, the maximum on–
chip decoded address is selectable by software using
the ROMSIZE
TM
feature. Software can cause the
DS87C530 to behave like a device with less on–chip
memory. This is beneficial when overlapping external
memory, such as Flash, is used.
The maximum memory size is dynamically variable.
Thus a portion of memory can be removed from the
memory map to access off–chip memory, then restored
to access on–chip memory. In fact, all of the on–chip
memory can be removed from the memory map allow-
ing the full 64KB memory space to be addressed from
off–chip memory. ROM addresses that are larger than
the selected maximum are automatically fetched from
outside the part via Ports 0 and 2. A depiction of the
ROM memory map is shown in Figure 4.
The ROMSIZE register is used to select the maximum
on–chip decoded address for ROM. Bits RMS2, RMS1,
RMS0 have the following affect:
RMS2
0
0
0
0
1
1
1
1
RMS1
0
0
1
1
0
0
1
1
RMS0
0
1
0
1
0
1
0
1
Maximum on–chip
ROM Address
0KB
1KB
2KB
4KB
8KB
16KB (default)
Invalid – reserved
Invalid – reserved
The reset default condition is a maximum on–chip ROM
address of 16KB. Thus no action is required if this fea-
ture is not used. When accessing external program
memory, the first 16KB would be inaccessible. To select
a smaller effective ROM size, software must alter bits
RMS2–RMS0. Altering these bits requires a Timed
Access procedure as explained below.
Care should be taken so that changing the ROMSIZE
register does not corrupt program execution. For exam-
ple, assume that a DS87C520 is executing instructions
from internal program memory near the 12KB boundary
(~3000h) and that the ROMSIZE register is currently
configured for a 16KB internal program space. If soft-
ware reconfigures the ROMSIZE register to 4KB
(0000h–0FFFh) in the current state, the device will
immediately jump to external program execution
because program code from 4KB to 16KB
(1000h–3FFFh) is no longer located on–chip. This
could result in code misalignment and execution of an
invalid instruction. The recommended method is to
modify the ROMSIZE register from a location in memory
that will be internal (or external) both before and after the
operation. In the above example, the instruction which
modifies the ROMSIZE register should be located
below the 4KB (1000h) boundary, so that it will be unaf-
fected by the memory modification. The same precau-
tion should be applied if the internal program memory
size is modified while executing from external program
memory.
Off–chip memory is accessed using the multiplexed
address/data bus on P0 and the MSB address on P2.
While serving as a memory bus, these pins are not I/O
ports. This convention follows the standard 8051
method of expanding on–chip memory. Off–chip ROM
access also occurs if the EA pin is a logic 0. EA over-
rides all bit settings. The PSEN signal will go active (low)
to serve as a chip enable or output enable when Ports 0
and 2 fetch from external ROM.