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參數(shù)資料
| 型號： | DS87C550-QNL |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 25/49頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC MCU EPROM ADC/PWM HS 68-PLCC |
| 標(biāo)準(zhǔn)包裝： | 18 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SIO，UART/USART |
| 外圍設(shè)備： | 電源故障復(fù)位，PWM，WDT |
| 輸入/輸出數(shù)： | 55 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 6x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 包裝： | 管件 |
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DS87C550 EPROM High-Speed Microcontroller with ADC and PWM
31 of 49
Program the DS87C550 as follows:
1. Apply the address value.
2. Apply the data value.
3. Select the programming option from Table 10 using the control signals.
4. Increase the voltage on VPP from 5V to 12.75V if writing to the EPROM.
5. Pulse the
PROG signal 5 times for EPROM array and 25 times for encryption table, lock bits, and
other EPROM bits.
6. Repeat as many times as necessary.
EPROM PROGRAMMING MODES Table 10
MODE
RST
PSEN
ALE/
PROG
EA/
VPP
P2.6
P2.7
P3.3
P3.6
P3.7
Program Code Data
H
L
PL5*
12.75 V
L
H
Verify Code Data
H
L
H
L
H
Program Encryption Array
Address 0-3Fh
H
L
PL25*
12.75 V
L
H
L
H
Program Lock Bits
LB1
H
L
PL25*
12.75 V
H
LB2
H
L
PL25*
12.75 V
H
L
LB3
H
L
PL25*
12.75 V
H
L
H
L
Program Option Register
Address FCh
H
L
PL25*
12.75 V
L
H
L
Read Signature or Option
Register 30, 31, 60, FCh
H
L
H
L
*PLn indicates pulse to a logic low n times
EPROM LOCK BITS Table 11
Level
Lock Bits
Protection
LB1
LB2
LB3
1
U
No program lock. Encrypted; verify if Encryption table was programmed.
2
P
U
Prevent MOVC instructions in external memory from reading program bytes in
internal memory.
EA is sampled and latched on reset. Allow no further programming
of EPROM.
3
P
U
Level 2 plus no verify operation. Also, prevents MOVX instructions in external
memory from reading SRAM (MOVX) in internal memory.
4
P
Level 3 plus no external execution.
SECURITY OPTIONS
The DS87C550 employs a standard three-level lock that restricts viewing of the EPROM contents. A 64-
byte Encryption Array allows the authorized user to verify memory by presenting the data in encrypted
form.
Lock Bits
The security lock consists of 3 lock bits. These bits select a total of four levels. Higher levels provide
increasing security but also limit application flexibility. Table 11 shows the security settings. Note that
the programmer cannot directly read the state of the security lock.
Encryption Array
The Encryption Array allows an authorized user to verify EPROM without allowing the true memory to
be dumped. During a verify operation, each byte is Exclusive NORed (XNOR) with a byte in the
Encryption Array. This results in a true representation of the EPROM while the Encryption is
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