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參數(shù)資料
| 型號： | DS87C550-QNL |
| 廠商： | Maxim Integrated Products |
| 文件頁數(shù)： | 34/49頁 |
| 文件大小： | 0K |
| 描述： | IC MCU EPROM ADC/PWM HS 68-PLCC |
| 標準包裝： | 18 |
| 系列： | 87C |
| 核心處理器： | 8051 |
| 芯體尺寸： | 8-位 |
| 速度： | 33MHz |
| 連通性： | EBI/EMI，SIO，UART/USART |
| 外圍設(shè)備： | 電源故障復(fù)位，PWM，WDT |
| 輸入/輸出數(shù)： | 55 |
| 程序存儲器容量： | 8KB（8K x 8） |
| 程序存儲器類型： | OTP |
| RAM 容量： | 1K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 4.5 V ~ 5.5 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 6x10b |
| 振蕩器型： | 外部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 68-LCC（J 形引線） |
| 包裝： | 管件 |
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DS87C550 EPROM High-Speed Microcontroller with ADC and PWM
4 of 49
PIN DESCRIPTION Table 1
PLCC/
CLCC
QFP
SIGNAL NAME
DESCRIPTION
2
72
VCC
VCC - Digital +5V power input.
36
37
34
35
GND
GND – Digital ground.
15
9
RST
RST - I/O. The RST input pin contains a Schmitt voltage input to recognize
external active high Reset inputs. The pin also employs an internal pulldown
resistor to allow for a combination of wired OR external Reset sources. An RC is
not required for power-up, as the DS87C550 provides this function internally. This
pin also acts as an output when the source of the reset is internal to the device (i.e.,
watchdog timer, power-fail, or crystal-fail detect). In this case, the RST pin will be
held high while the processor is in a Reset state, and will return to low as the
processor exits this state. When this output capability is used, the RST pin should
not be connected to an RC network or a logic output driver.
35
34
32
31
XTAL1
XTAL2
Input - The crystal oscillator pins XTAL1 and XTAL2 provide support for
fundamental mode, parallel resonant, AT cut crystals. XTAL1 acts also as an input
if there is an external clock source in place of a crystal. XTAL2 serves as the
output of the crystal amplifier. Note that this output cannot be used to drive any
additional load when a crystal is attached as this can disturb the oscillator circuit.
47
48
PSEN
PSEN
- Output. The Program Store Enable output. This signal is commonly
connected to optional external ROM memory as a chip enable.
PSEN will provide
an active low pulse during a program byte access, and is driven high when not
accessing external program memory.
48
49
ALE
ALE - Output. The Address Latch Enable output functions as a clock to latch the
external address LSB from the multiplexed address/data bus on Port 0. This signal
is commonly connected to the latch enable of an external 373 family transparent
latch. ALE is driven high when the DS87C550 is in a Reset condition. ALE can
also be disabled and forced high using the EMI reduction mode ALEOFF.
49
50
EA
EA
- Input. An active low input pin that when connected to ground will force the
DS87C550 to use an external program memory. The internal RAM is still
accessible as determined by register settings. EA should be connected to VCC to
use internal program memory. The input level on this pin is latched at reset.
16-23
10-17
P1.0-P1.7
Port 1 - I/O. Port 1 functions as both an 8-bit, bi-directional I/O port and an
alternate functional interface for several internal resources. The reset condition of
Port 1 is all bits at logic 1. In this state, a weak pullup holds the port high. This
condition allows the pins to serve as both input and output. Input is possible since
any external circuit whose output drives the port will overcome the weak pullup.
When software writes a 0 to any Port 1 pin, the DS87C550 will activate a strong
pulldown that remains on until either a 1 is written or a reset occurs. Writing a 1
after the port has been at 0 will cause a strong transition driver to turn on, followed
by a weaker sustaining pullup. Once the momentary strong driver turns off, the
port again returns to a weakly held high output (and input) state. The alternate
functions of Port 1 pins are detailed below. Note that when the Capture/Compare
functions of timer 2 are used, the interrupt input pins become capture trigger
inputs.
Port
Alternate Function
16
10
P1.0
INT2/CT0 External Interrupt 2/Capture Trigger 0
17
11
P1.1
INT3/CT1 External Interrupt 3/Capture Trigger 1
18
12
P1.2
INT4/CT2 External Interrupt 4/Capture Trigger 2
19
13
P1.3
INT5/CT3 External Interrupt 5/Capture Trigger 3
20
14
P1.4
T2
External I/O for Timer/Counter 2
21
15
P1.5
T2EX
Timer/Counter 2 Capture/Reload Trigger
22
16
P1.6
RXD1
Serial Port 1 Input
23
17
P1.7
TXD1
Serial Port 1 Output
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