參數(shù)資料
型號: DSM2180F3V90T6
廠商: 意法半導體
元件分類: 數(shù)字信號處理
英文描述: DSM (Digital Signal Processor System Memory) For Analog Devices ADSP-218X Family (5V Supply)
中文描述: 帝斯曼(數(shù)字信號處理器系統(tǒng)內(nèi)存)模擬器件公司的ADSP - 218X系列(5V電源)
文件頁數(shù): 55/63頁
文件大?。?/td> 809K
代理商: DSM2180F3V90T6
55/63
DSM2180F3
Table 33. Flash Memory Program, Write and Erase Times
Symbol
Note: 1. Programmed to all zero before erase.
2. The polling status, DQ7, is valid tQ7VQV time units before the data byte, DQ0-DQ7, is valid for reading.
Table 34. Reset (Reset) Timing
Note: 1. Reset (RESET) does not reset Flash memory Program or Erase cycles.
2. Warm reset aborts Flash memory Program or Erase cycles, and puts the device in Read mode.
Figure 36. Reset (RESET) Timing
Parameter
Min.
Typ.
Max.
Unit
Flash Bulk Erase
1
(pre-programmed)
3
30
s
Flash Bulk Erase (not pre-programmed)
5
s
t
WHQV3
Sector Erase (pre-programmed)
1
30
s
t
WHQV2
Sector Erase (not pre-programmed)
2.2
s
t
WHQV1
Byte Program
14
1200
μs
Program / Erase Cycles (per Sector)
100,000
cycles
t
WHWLO
Sector Erase Time-Out
100
μs
t
Q7VQV
DQ7 Valid to Output (DQ7-DQ0) Valid (Data Polling)
2
30
ns
Symbol
Parameter
Conditions
Min
Max
Unit
t
NLNH
RESET Active Low Time
1
150
ns
t
NLNH–PO
Power On Reset Active Low Time
1
ms
t
OPR
RESET High to Operational Device
120
ns
tNLNH-PO
Power-On Reset
tOPR
AI02866b
RESET
tNLNH
tNLNH-A
Warm Reset
tOPR
V
CC
V
CC
(min)
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