參數(shù)資料
型號: DSP56364P
廠商: 飛思卡爾半導體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: 24-Bit Audio Digital Signal Processor
中文描述: 24位音頻數(shù)字信號處理器
文件頁數(shù): 16/148頁
文件大?。?/td> 1204K
代理商: DSP56364P
JTAG/OnCE Interface
DSP56364 Technical Data, Rev. 4
2-12
Freescale Semiconductor
2.9
JTAG/OnCE Interface
Table 2-11 JTAG/OnCE Interface
Signal
Name
Signal
Type
State during
Reset
Signal Description
TCK
Input
Input
Test Clock
—TCK is a test clock input signal used to synchronize the JTAG test logic.
It has an internal pull-up resistor.
This input is 5 V tolerant.
TDI
Input
Input
Test Data Input
—TDI is a test data serial input signal used for test instructions and
data. TDI is sampled on the rising edge of TCK and has an internal pull-up resistor.
This input is 5 V tolerant.
TDO
Output
Tri-stated
Test Data Output
—TDO is a test data serial output signal used for test instructions and
data. TDO is tri-statable and is actively driven in the shift-IR and shift-DR controller
states. TDO changes on the falling edge of TCK.
TMS
Input
Input
Test Mode Select
—TMS is an input signal used to sequence the test controller’s state
machine. TMS is sampled on the rising edge of TCK and has an internal pull-up
resistor.
This input is 5 V tolerant.
Table 2-12 GPIO Signals
Signal
Name
Signal Type
State during
Reset
Signal Description
GPIO0-GP
IO3
Input, output or
disconnected
Disconnected
GPIO0-3- The General Purpose I/O pins are used for control and
handshake functions between the DSP and external circuitry. Each Port B
GPIO pin may be individually programmed as an input, output or
disconnected
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