參數(shù)資料
型號： DSP56364P
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類： 數(shù)字信號處理
英文描述： 24-Bit Audio Digital Signal Processor
中文描述： 24位音頻數(shù)字信號處理器
文件頁數(shù)： 37/148頁
文件大?。?/td> 1204K
代理商： DSP56364P
External Memory Expansion Port (Port A)
DSP56364 Technical Data, Rev. 4
Freescale Semiconductor
3-21
147
Last WR assertion to RAS deassertion
t
RWL
2.75
×
T
C
4.3
33.4
—
26.8
—
ns
148
WR assertion to CAS deassertion
t
CWL
2.5
×
T
C
4.3
33.6
—
27.0
—
ns
149
Data valid to CAS assertion (write)
t
DS
0.25
×
T
C
3.7
0.1
—
—
—
ns
0.25
×
T
C
3.0
—
—
0.1
—
ns
150
CAS assertion to data not valid (write)
t
DH
1.75
×
T
C
4.0
22.5
—
17.9
—
ns
151
WR assertion to CAS assertion
t
WCS
T
C
4.3
10.9
—
8.2
—
ns
152
Last RD assertion to RAS deassertion
t
ROH
2.5
×
T
C
4.0
33.9
—
27.3
—
ns
153
RD assertion to data valid
t
GA
1.75
×
T
C
7.5
—
19.0
—
—
ns
1.75
×
T
C
6.5
—
—
—
15.4
ns
154
RD deassertion to data not valid
7
t
GZ
0.0
—
0.0
—
ns
155
WR assertion to data active
0.75
×
T
C
0.3
11.1
—
9.1
—
ns
156
WR deassertion to data high impedance
0.25
×
T
C
—
3.8
—
3.1
ns
1
The number of wait states for Page mode access is specified in the DCR.
2
The refresh period is specified in the DCR.
3
The asynchronous delays specified in the expressions are valid for DSP56364.
4
There are no DRAMs fast enough to fit to two wait states Page mode @ 100MHz (See
Figure 3-11
)
5
All the timings are calculated for the worst case. Some of the timings are better for specific cases (e.g., t
PC
equals 3
×
T
C
for
read-after-read or write-after-write sequences).
6
BRW[1:0] (DRAM Control Register bits) defines the number of wait states that should be inserted in each DRAM out-of-page
access.
7
RD deassertion will always occur after CAS deassertion; therefore, the restricted timing is t
OFF
and not t
GZ.
Table 3-10 DRAM Page Mode Timings, Two Wait States
1, 2, 3, 4
(continued)
No.
Characteristics
Symbol
Expression
5
66 MHz
80 MHz
Unit
Min
Max
Min
Max
相關(guān)PDF資料
PDF描述
DSP56366P 24-Bit Audio Digital Signal Processor
DSP56366UM 24-Bit Audio Digital Signal Processor
DSP56367P 24-Bit Audio Digital Signal Processor
DSP56367UM 24-Bit Audio Digital Signal Processor
DSP56600 Implementing Viterbi Decoders Using the VSL Instruction on DSP Families
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
DSP56364UM 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56364 24-Bit Digital Signal Processor User＇s Manual
DSP56366 制造商:未知廠家 制造商全稱:未知廠家 功能描述:DSP56366 24-Bit Audio Digital Signal Processor
DSP56366P 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor
DSP56366UM 制造商:FREESCALE 制造商全稱:Freescale Semiconductor, Inc 功能描述:24-Bit Audio Digital Signal Processor
DSP56367 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Optoelectronic
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