參數(shù)資料
型號(hào): DSP56F803E
廠商: 飛思卡爾半導(dǎo)體(中國(guó))有限公司
英文描述: 16-bit Digital Signal Controllers
中文描述: 16位數(shù)字信號(hào)控制器
文件頁數(shù): 23/52頁
文件大?。?/td> 414K
代理商: DSP56F803E
Flash Memory Characteristics
56F803 Technical Data, Rev. 15
Freescale Semiconductor
23
Figure 3-2 Input Signal Measurement References
Figure 3-3
shows the definitions of the following signal states:
Active state, when a bus or signal is driven, and enters a low impedance state
Tri-stated, when a bus or signal is placed in a high impedance state
Data Valid state, when a signal level has reached V
OL
or V
OH
Data Invalid state, when a signal level is in transition between V
OL
and V
OH
Figure 3-3 Signal States
3.4 Flash Memory Characteristics
Table 3-5 Flash Memory Truth Table
Mode
XE
1
1.
X address enable, all rows are disabled when XE = 0
YE
2
2.
Y address enable, YMUX is disabled when YE = 0
SE
3
3.
Sense amplifier enable
OE
4
4.
Output enable, tri-state Flash data out bus when OE = 0
PROG
5
ERASE
6
MAS1
7
NVSTR
8
Standby
L
L
L
L
L
L
L
L
Read
H
H
H
H
L
L
L
L
Word Program
H
H
L
L
H
L
L
H
Page Erase
H
L
L
L
L
H
L
H
Mass Erase
H
L
L
L
L
H
H
H
V
IH
V
IL
Fall Time
Input Signal
Note: The midpoint is V
IL
+ (V
IH
– V
IL
)/2.
Midpoint1
Low
High
90%
50%
10%
Rise Time
Data Invalid State
Data1
Data2 Valid
Data
Tri-stated
Data3 Valid
Data2
Data3
Data1 Valid
Data Active
Data Active
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