參數(shù)資料
型號： DSP56F805
廠商： 飛思卡爾半導(dǎo)體(中國)有限公司
英文描述： 16-bit Hybrid Controller(16位混合控制器)
中文描述： 16位混合控制器（16位混合控制器）
文件頁數(shù)： 37/48頁
文件大?。?/td> 967K
代理商： DSP56F805
Analog-to-Digital Converter (ADC) Characteristics
56F805 Technical Data
37
3.12 Analog-to-Digital Converter (ADC) Characteristics
Table 35. ADC Characteristics
Operating Conditions:
V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, V
REF
= V
DD
-0.3V, ADCDIV = 4, 9, or 14, (for optimal
performance), ADC clock = 4MHz, 3.0–3.6 V, T
A
= –40
°
to +85
°
C, C
L
≤
50pF, f
OP
= 80MHz
Characteristic
Symbol
Min
Typ
Max
Unit
ADC input voltages
V
ADCIN
0
1
1.
a digital output code of 0.
2.
V
REF
must be equal to or less than V
DDA
and must be greater than 2.7V. For optimal ADC performance, set V
REF
to V
DDA
-0.3V.
3.
.
Measured in 10-90% range.
4.
LSB = Least Significant Bit.
5.
Guaranteed by characterization.
6.
t
AIC
= 1/
f
ADIC
For optimum ADC performance, keep the minimum V
ADCIN
value > 25mV. Inputs less than 25mV may convert to
—
V
REF2
V
Resolution
R
ES
12
—
12
Bits
Integral Non-Linearity
3
INL
—
+/-2.5
+/-4
LSB
4
Differential Non-Linearity
DNL
—
+/- 0.9
+/-1
LSB
4
Monotonicity
GUARANTEED
ADC internal clock
5
f
ADIC
0.5
—
5
MHz
Conversion range
R
AD
V
SSA
—
V
DDA
V
Conversion time
t
ADC
—
6
—
t
AIC
cycles
6
Sample time
t
ADS
—
1
—
t
AIC
cycles
6
Input capacitance
C
ADI
—
5
—
pF
6
Gain Error (transfer gain)
5
E
GAIN
.95
1.00
1.10
—
Offset Voltage
5
V
OFFSET
-80
-15
+20
mV
Total Harmonic Distortion
5
THD
60
64
—
dB
Signal-to-Noise plus Distortion
5
SINAD
55
60
—
dB
Effective Number Of Bits
5
ENOB
9
10
—
bit
Spurious Free Dynamic Range
5
SFDR
65
70
—
dB
Bandwidth
BW
—
100
—
KHz
ADC Quiescent Current (both ADCs)
I
ADC
—
50
—
mA
V
REF
Quiescent Current (both ADCs)
I
VREF
—
12
16.5
mA
F
Freescale Semiconductor, Inc.
For More Information On This Product,
Go to: www.freescale.com
n
.
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