參數(shù)資料
型號: DSP56F805FV80E
廠商: Freescale Semiconductor
文件頁數(shù): 14/56頁
文件大?。?/td> 0K
描述: IC DSP 80MHZ 64KB FLASH 144LQFP
標(biāo)準(zhǔn)包裝: 60
系列: 56F8xx
核心處理器: 56800
芯體尺寸: 16-位
速度: 80MHz
連通性: CAN,EBI/EMI,SCI,SPI
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 71KB(35.5K x 16)
程序存儲器類型: 閃存
RAM 容量: 2.5K x 16
電壓 - 電源 (Vcc/Vdd): 3 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x12b
振蕩器型: 外部
工作溫度: -40°C ~ 85°C
封裝/外殼: 144-LQFP
包裝: 托盤
General Characteristics
56F805 Technical Data, Rev. 16
Freescale Semiconductor
21
Notes:
1.
Theta-JA determined on 2s2p test boards is frequently lower than would be observed in an application.
Determined on 2s2p thermal test board.
2.
Junction to ambient thermal resistance, Theta-JA (RθJA) was simulated to be equivalent to the JEDEC
specification JESD51-2 in a horizontal configuration in natural convection. Theta-JA was also simulated on
a thermal test board with two internal planes (2s2p where “s” is the number of signal layers and “p” is the
number of planes) per JESD51-6 and JESD51-7. The correct name for Theta-JA for forced convection or with
the non-single layer boards is Theta-JMA.
3.
Junction to case thermal resistance, Theta-JC (RθJC ), was simulated to be equivalent to the measured values
using the cold plate technique with the cold plate temperature used as the “case” temperature. The basic cold
plate measurement technique is described by MIL-STD 883D, Method 1012.1. This is the correct thermal
metric to use to calculate thermal performance when the package is being used with a heat sink.
Voltage difference VDD to VDDA
ΔV
DD
-0.1
-
0.1
V
Voltage difference VSS to VSSA
ΔV
SS
-0.1
-
0.1
V
ADC reference voltage
VREF
2.7
VDDA
V
Ambient operating temperature
TA
–40
85
°C
Table 3-3 Thermal Characteristics6
Characteristic
Comments
Symbol
Value
Unit
Notes
144-pin LQFP
Junction to ambient
Natural convection
RθJA
47.1
°C/W
2
Junction to ambient (@1m/sec)
RθJMA
43.8
°C/W
2
Junction to ambient
Natural convection
Four layer board
(2s2p)
RθJMA
(2s2p)
40.8
°C/W
1,2
Junction to ambient (@1m/sec)
Four layer board
(2s2p)
RθJMA
39.2
°C/W
1,2
Junction to case
RθJC
11.8
°C/W
3
Junction to center of case
Ψ
JT
1°C/W
4, 5
I/O pin power dissipation
P I/O
User Determined
W
Power dissipation
P D
P D = (IDD x VDD + P I/O)W
Junction to center of case
PDMAX
(TJ - TA) /R
θJA
W7
Table 3-2 Recommended Operating Conditions
Characteristic
Symbol
Min
Typ
Max
Unit
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