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參數(shù)資料
| 型號(hào)： | DSP56F807VF80E |
| 廠商： | 飛思卡爾半導(dǎo)體(中國)有限公司 |
| 英文描述： | 16-bit Digital Signal Controllers |
| 中文描述： | 16位數(shù)字信號(hào)控制器 |
| 文件頁數(shù)： | 45/60頁 |
| 文件大?。?/td> | 522K |
| 代理商： | DSP56F807VF80E |
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Controller Area Network (CAN) Timing
56F807 Technical Data Technical Data, Rev. 15
Freescale Semiconductor
45
.
1.
Parasitic capacitance due to package, pin to pin, and pin to package base coupling. (1.8pf)
2.
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing. (2.04pf)
3.
Equivalent resistance for the ESD isolation resistor and the channel select mux. (500 ohms)
4.
sampling time. (1pf)
Sampling capacitor at the sample and hold circuit. Capacitor 4 is normally disconnected from the input and is only connected to it at
Figure 3-27 Equivalent Analog Input Circuit
3.12 Controller Area Network (CAN) Timing
Figure 3-28 Bus Wakeup Detection
Table 3-17 CAN Timing
2
Operating Conditions: V
SS
= V
SSA
= 0 V, V
DD
= V
DDA
= 3.0–3.6 V, T
A
= –40
°
to +85
°
C, C
L
< 50pF, MSCAN Clock = 30MHz
Characteristic
Symbol
Min
Max
Unit
Baud Rate
BR
CAN
—
1
Mbps
Bus Wakeup detection
1
1.
(on MSCAN_RX pin) whose duration is less than 5 microseconds is filtered away. However, a valid CAN bus wakeup detection
takes place for a wakeup pulse equal to or greater than 5 microseconds. The number 5 microseconds originates from the fact
that the CAN wakeup message consists of 5 dominant bits at the highest possible baud rate of 1Mbps.
If Wakeup glitch filter is enabled during the design initialization and also CAN is put into SLEEP mode then, any bus event
2.
Parameters listed are guaranteed by design
T
WAKEUP
5
—
μ
s
1
2
3
4
ADC analog input
T
WAKEUP
MSCAN_RX
CAN receive
data pin
(Input)
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| DSP56F807VF80E | 制造商:Freescale Semiconductor 功能描述:Digital Signal Processor IC |
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| DSP56F826-827UM/D | 制造商:MOTOROLA 制造商全稱:Motorola, Inc 功能描述:56F827 16-bit Hybrid Controller |
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